LCOV - code coverage report
Current view: top level - drivers/net/ice/base - ice_common.c (source / functions) Hit Total Coverage
Test: Code coverage Lines: 0 1819 0.0 %
Date: 2024-01-22 16:13:49 Functions: 0 147 0.0 %
Legend: Lines: hit not hit | Branches: + taken - not taken # not executed Branches: 0 1242 0.0 %

           Branch data     Line data    Source code
       1                 :            : /* SPDX-License-Identifier: BSD-3-Clause
       2                 :            :  * Copyright(c) 2001-2023 Intel Corporation
       3                 :            :  */
       4                 :            : 
       5                 :            : #include "ice_common.h"
       6                 :            : #include "ice_sched.h"
       7                 :            : #include "ice_adminq_cmd.h"
       8                 :            : 
       9                 :            : #include "ice_flow.h"
      10                 :            : #include "ice_switch.h"
      11                 :            : 
      12                 :            : #define ICE_PF_RESET_WAIT_COUNT 300
      13                 :            : 
      14                 :            : /**
      15                 :            :  * dump_phy_type - helper function that prints PHY type strings
      16                 :            :  * @hw: pointer to the HW structure
      17                 :            :  * @phy: 64 bit PHY type to decipher
      18                 :            :  * @i: bit index within phy
      19                 :            :  * @phy_string: string corresponding to bit i in phy
      20                 :            :  * @prefix: prefix string to differentiate multiple dumps
      21                 :            :  */
      22                 :            : static void
      23                 :          0 : dump_phy_type(struct ice_hw *hw, u64 phy, u8 i, const char *phy_string,
      24                 :            :               const char *prefix)
      25                 :            : {
      26         [ #  # ]:          0 :         if (phy & BIT_ULL(i))
      27         [ #  # ]:          0 :                 ice_debug(hw, ICE_DBG_PHY, "%s: bit(%d): %s\n", prefix, i,
      28                 :            :                           phy_string);
      29                 :          0 : }
      30                 :            : 
      31                 :            : /**
      32                 :            :  * ice_dump_phy_type_low - helper function to dump phy_type_low
      33                 :            :  * @hw: pointer to the HW structure
      34                 :            :  * @low: 64 bit value for phy_type_low
      35                 :            :  * @prefix: prefix string to differentiate multiple dumps
      36                 :            :  */
      37                 :            : static void
      38                 :          0 : ice_dump_phy_type_low(struct ice_hw *hw, u64 low, const char *prefix)
      39                 :            : {
      40         [ #  # ]:          0 :         ice_debug(hw, ICE_DBG_PHY, "%s: phy_type_low: 0x%016llx\n", prefix,
      41                 :            :                   (unsigned long long)low);
      42                 :            : 
      43                 :          0 :         dump_phy_type(hw, low, 0, "100BASE_TX", prefix);
      44                 :          0 :         dump_phy_type(hw, low, 1, "100M_SGMII", prefix);
      45                 :          0 :         dump_phy_type(hw, low, 2, "1000BASE_T", prefix);
      46                 :          0 :         dump_phy_type(hw, low, 3, "1000BASE_SX", prefix);
      47                 :          0 :         dump_phy_type(hw, low, 4, "1000BASE_LX", prefix);
      48                 :          0 :         dump_phy_type(hw, low, 5, "1000BASE_KX", prefix);
      49                 :          0 :         dump_phy_type(hw, low, 6, "1G_SGMII", prefix);
      50                 :          0 :         dump_phy_type(hw, low, 7, "2500BASE_T", prefix);
      51                 :          0 :         dump_phy_type(hw, low, 8, "2500BASE_X", prefix);
      52                 :          0 :         dump_phy_type(hw, low, 9, "2500BASE_KX", prefix);
      53                 :          0 :         dump_phy_type(hw, low, 10, "5GBASE_T", prefix);
      54                 :          0 :         dump_phy_type(hw, low, 11, "5GBASE_KR", prefix);
      55                 :          0 :         dump_phy_type(hw, low, 12, "10GBASE_T", prefix);
      56                 :          0 :         dump_phy_type(hw, low, 13, "10G_SFI_DA", prefix);
      57                 :          0 :         dump_phy_type(hw, low, 14, "10GBASE_SR", prefix);
      58                 :          0 :         dump_phy_type(hw, low, 15, "10GBASE_LR", prefix);
      59                 :          0 :         dump_phy_type(hw, low, 16, "10GBASE_KR_CR1", prefix);
      60                 :          0 :         dump_phy_type(hw, low, 17, "10G_SFI_AOC_ACC", prefix);
      61                 :          0 :         dump_phy_type(hw, low, 18, "10G_SFI_C2C", prefix);
      62                 :          0 :         dump_phy_type(hw, low, 19, "25GBASE_T", prefix);
      63                 :          0 :         dump_phy_type(hw, low, 20, "25GBASE_CR", prefix);
      64                 :          0 :         dump_phy_type(hw, low, 21, "25GBASE_CR_S", prefix);
      65                 :          0 :         dump_phy_type(hw, low, 22, "25GBASE_CR1", prefix);
      66                 :          0 :         dump_phy_type(hw, low, 23, "25GBASE_SR", prefix);
      67                 :          0 :         dump_phy_type(hw, low, 24, "25GBASE_LR", prefix);
      68                 :          0 :         dump_phy_type(hw, low, 25, "25GBASE_KR", prefix);
      69                 :          0 :         dump_phy_type(hw, low, 26, "25GBASE_KR_S", prefix);
      70                 :          0 :         dump_phy_type(hw, low, 27, "25GBASE_KR1", prefix);
      71                 :          0 :         dump_phy_type(hw, low, 28, "25G_AUI_AOC_ACC", prefix);
      72                 :          0 :         dump_phy_type(hw, low, 29, "25G_AUI_C2C", prefix);
      73                 :          0 :         dump_phy_type(hw, low, 30, "40GBASE_CR4", prefix);
      74                 :          0 :         dump_phy_type(hw, low, 31, "40GBASE_SR4", prefix);
      75                 :          0 :         dump_phy_type(hw, low, 32, "40GBASE_LR4", prefix);
      76                 :          0 :         dump_phy_type(hw, low, 33, "40GBASE_KR4", prefix);
      77                 :          0 :         dump_phy_type(hw, low, 34, "40G_XLAUI_AOC_ACC", prefix);
      78                 :          0 :         dump_phy_type(hw, low, 35, "40G_XLAUI", prefix);
      79                 :          0 :         dump_phy_type(hw, low, 36, "50GBASE_CR2", prefix);
      80                 :          0 :         dump_phy_type(hw, low, 37, "50GBASE_SR2", prefix);
      81                 :          0 :         dump_phy_type(hw, low, 38, "50GBASE_LR2", prefix);
      82                 :          0 :         dump_phy_type(hw, low, 39, "50GBASE_KR2", prefix);
      83                 :          0 :         dump_phy_type(hw, low, 40, "50G_LAUI2_AOC_ACC", prefix);
      84                 :          0 :         dump_phy_type(hw, low, 41, "50G_LAUI2", prefix);
      85                 :          0 :         dump_phy_type(hw, low, 42, "50G_AUI2_AOC_ACC", prefix);
      86                 :          0 :         dump_phy_type(hw, low, 43, "50G_AUI2", prefix);
      87                 :          0 :         dump_phy_type(hw, low, 44, "50GBASE_CP", prefix);
      88                 :          0 :         dump_phy_type(hw, low, 45, "50GBASE_SR", prefix);
      89                 :          0 :         dump_phy_type(hw, low, 46, "50GBASE_FR", prefix);
      90                 :          0 :         dump_phy_type(hw, low, 47, "50GBASE_LR", prefix);
      91                 :          0 :         dump_phy_type(hw, low, 48, "50GBASE_KR_PAM4", prefix);
      92                 :          0 :         dump_phy_type(hw, low, 49, "50G_AUI1_AOC_ACC", prefix);
      93                 :          0 :         dump_phy_type(hw, low, 50, "50G_AUI1", prefix);
      94                 :          0 :         dump_phy_type(hw, low, 51, "100GBASE_CR4", prefix);
      95                 :          0 :         dump_phy_type(hw, low, 52, "100GBASE_SR4", prefix);
      96                 :          0 :         dump_phy_type(hw, low, 53, "100GBASE_LR4", prefix);
      97                 :          0 :         dump_phy_type(hw, low, 54, "100GBASE_KR4", prefix);
      98                 :          0 :         dump_phy_type(hw, low, 55, "100G_CAUI4_AOC_ACC", prefix);
      99                 :          0 :         dump_phy_type(hw, low, 56, "100G_CAUI4", prefix);
     100                 :          0 :         dump_phy_type(hw, low, 57, "100G_AUI4_AOC_ACC", prefix);
     101                 :          0 :         dump_phy_type(hw, low, 58, "100G_AUI4", prefix);
     102                 :          0 :         dump_phy_type(hw, low, 59, "100GBASE_CR_PAM4", prefix);
     103                 :          0 :         dump_phy_type(hw, low, 60, "100GBASE_KR_PAM4", prefix);
     104                 :          0 :         dump_phy_type(hw, low, 61, "100GBASE_CP2", prefix);
     105                 :          0 :         dump_phy_type(hw, low, 62, "100GBASE_SR2", prefix);
     106                 :          0 :         dump_phy_type(hw, low, 63, "100GBASE_DR", prefix);
     107                 :          0 : }
     108                 :            : 
     109                 :            : /**
     110                 :            :  * ice_dump_phy_type_high - helper function to dump phy_type_high
     111                 :            :  * @hw: pointer to the HW structure
     112                 :            :  * @high: 64 bit value for phy_type_high
     113                 :            :  * @prefix: prefix string to differentiate multiple dumps
     114                 :            :  */
     115                 :            : static void
     116                 :          0 : ice_dump_phy_type_high(struct ice_hw *hw, u64 high, const char *prefix)
     117                 :            : {
     118         [ #  # ]:          0 :         ice_debug(hw, ICE_DBG_PHY, "%s: phy_type_high: 0x%016llx\n", prefix,
     119                 :            :                   (unsigned long long)high);
     120                 :            : 
     121                 :          0 :         dump_phy_type(hw, high, 0, "100GBASE_KR2_PAM4", prefix);
     122                 :          0 :         dump_phy_type(hw, high, 1, "100G_CAUI2_AOC_ACC", prefix);
     123                 :          0 :         dump_phy_type(hw, high, 2, "100G_CAUI2", prefix);
     124                 :          0 :         dump_phy_type(hw, high, 3, "100G_AUI2_AOC_ACC", prefix);
     125                 :          0 :         dump_phy_type(hw, high, 4, "100G_AUI2", prefix);
     126                 :          0 : }
     127                 :            : 
     128                 :            : /**
     129                 :            :  * ice_set_mac_type - Sets MAC type
     130                 :            :  * @hw: pointer to the HW structure
     131                 :            :  *
     132                 :            :  * This function sets the MAC type of the adapter based on the
     133                 :            :  * vendor ID and device ID stored in the HW structure.
     134                 :            :  */
     135                 :          0 : static enum ice_status ice_set_mac_type(struct ice_hw *hw)
     136                 :            : {
     137         [ #  # ]:          0 :         ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);
     138                 :            : 
     139         [ #  # ]:          0 :         if (hw->vendor_id != ICE_INTEL_VENDOR_ID)
     140                 :            :                 return ICE_ERR_DEVICE_NOT_SUPPORTED;
     141                 :            : 
     142   [ #  #  #  # ]:          0 :         switch (hw->device_id) {
     143                 :          0 :         case ICE_DEV_ID_E810C_BACKPLANE:
     144                 :            :         case ICE_DEV_ID_E810C_QSFP:
     145                 :            :         case ICE_DEV_ID_E810C_SFP:
     146                 :            :         case ICE_DEV_ID_E810_XXV_BACKPLANE:
     147                 :            :         case ICE_DEV_ID_E810_XXV_QSFP:
     148                 :            :         case ICE_DEV_ID_E810_XXV_SFP:
     149                 :          0 :                 hw->mac_type = ICE_MAC_E810;
     150                 :          0 :                 break;
     151                 :          0 :         case ICE_DEV_ID_E822C_10G_BASE_T:
     152                 :            :         case ICE_DEV_ID_E822C_BACKPLANE:
     153                 :            :         case ICE_DEV_ID_E822C_QSFP:
     154                 :            :         case ICE_DEV_ID_E822C_SFP:
     155                 :            :         case ICE_DEV_ID_E822C_SGMII:
     156                 :            :         case ICE_DEV_ID_E822L_10G_BASE_T:
     157                 :            :         case ICE_DEV_ID_E822L_BACKPLANE:
     158                 :            :         case ICE_DEV_ID_E822L_SFP:
     159                 :            :         case ICE_DEV_ID_E822L_SGMII:
     160                 :            :         case ICE_DEV_ID_E823L_10G_BASE_T:
     161                 :            :         case ICE_DEV_ID_E823L_1GBE:
     162                 :            :         case ICE_DEV_ID_E823L_BACKPLANE:
     163                 :            :         case ICE_DEV_ID_E823L_QSFP:
     164                 :            :         case ICE_DEV_ID_E823L_SFP:
     165                 :            :         case ICE_DEV_ID_E823C_10G_BASE_T:
     166                 :            :         case ICE_DEV_ID_E823C_BACKPLANE:
     167                 :            :         case ICE_DEV_ID_E823C_QSFP:
     168                 :            :         case ICE_DEV_ID_E823C_SFP:
     169                 :            :         case ICE_DEV_ID_E823C_SGMII:
     170                 :          0 :                 hw->mac_type = ICE_MAC_GENERIC;
     171                 :          0 :                 break;
     172                 :          0 :         case ICE_DEV_ID_E824S:
     173                 :            :         case ICE_DEV_ID_E825C_BACKPLANE:
     174                 :            :         case ICE_DEV_ID_E825C_QSFP:
     175                 :            :         case ICE_DEV_ID_E825C_SFP:
     176                 :            :         case ICE_DEV_ID_C825X:
     177                 :            :         case ICE_DEV_ID_E825C_SGMII:
     178                 :          0 :                 hw->mac_type = ICE_MAC_GENERIC_3K_E825;
     179                 :          0 :                 break;
     180                 :          0 :         default:
     181                 :          0 :                 hw->mac_type = ICE_MAC_UNKNOWN;
     182                 :          0 :                 break;
     183                 :            :         }
     184                 :            : 
     185         [ #  # ]:          0 :         ice_debug(hw, ICE_DBG_INIT, "mac_type: %d\n", hw->mac_type);
     186                 :            :         return ICE_SUCCESS;
     187                 :            : }
     188                 :            : 
     189                 :            : /**
     190                 :            :  * ice_is_generic_mac
     191                 :            :  * @hw: pointer to the hardware structure
     192                 :            :  *
     193                 :            :  * returns true if mac_type is ICE_MAC_GENERIC, false if not
     194                 :            :  */
     195                 :          0 : bool ice_is_generic_mac(struct ice_hw *hw)
     196                 :            : {
     197                 :          0 :         return (hw->mac_type == ICE_MAC_GENERIC ||
     198                 :          0 :                 hw->mac_type == ICE_MAC_GENERIC_3K ||
     199                 :            :                 hw->mac_type == ICE_MAC_GENERIC_3K_E825);
     200                 :            : }
     201                 :            : 
     202                 :            : /**
     203                 :            :  * ice_is_e810
     204                 :            :  * @hw: pointer to the hardware structure
     205                 :            :  *
     206                 :            :  * returns true if the device is E810 based, false if not.
     207                 :            :  */
     208                 :          0 : bool ice_is_e810(struct ice_hw *hw)
     209                 :            : {
     210                 :          0 :         return hw->mac_type == ICE_MAC_E810;
     211                 :            : }
     212                 :            : 
     213                 :            : /**
     214                 :            :  * ice_is_e810t
     215                 :            :  * @hw: pointer to the hardware structure
     216                 :            :  *
     217                 :            :  * returns true if the device is E810T based, false if not.
     218                 :            :  */
     219                 :          0 : bool ice_is_e810t(struct ice_hw *hw)
     220                 :            : {
     221      [ #  #  # ]:          0 :         switch (hw->device_id) {
     222                 :          0 :         case ICE_DEV_ID_E810C_SFP:
     223         [ #  # ]:          0 :                 switch (hw->subsystem_device_id) {
     224                 :            :                 case ICE_SUBDEV_ID_E810T:
     225                 :            :                 case ICE_SUBDEV_ID_E810T2:
     226                 :            :                 case ICE_SUBDEV_ID_E810T3:
     227                 :            :                 case ICE_SUBDEV_ID_E810T4:
     228                 :            :                 case ICE_SUBDEV_ID_E810T5:
     229                 :            :                 case ICE_SUBDEV_ID_E810T7:
     230                 :            :                         return true;
     231                 :            :                 }
     232                 :            :                 break;
     233                 :          0 :         case ICE_DEV_ID_E810C_QSFP:
     234         [ #  # ]:          0 :                 switch (hw->subsystem_device_id) {
     235                 :            :                 case ICE_SUBDEV_ID_E810T2:
     236                 :            :                 case ICE_SUBDEV_ID_E810T5:
     237                 :            :                 case ICE_SUBDEV_ID_E810T6:
     238                 :            :                         return true;
     239                 :            :                 }
     240                 :            :                 break;
     241                 :            :         default:
     242                 :            :                 break;
     243                 :            :         }
     244                 :            : 
     245                 :          0 :         return false;
     246                 :            : }
     247                 :            : 
     248                 :            : /**
     249                 :            :  * ice_is_e823
     250                 :            :  * @hw: pointer to the hardware structure
     251                 :            :  *
     252                 :            :  * returns true if the device is E823-L or E823-C based, false if not.
     253                 :            :  */
     254                 :          0 : bool ice_is_e823(struct ice_hw *hw)
     255                 :            : {
     256         [ #  # ]:          0 :         switch (hw->device_id) {
     257                 :            :         case ICE_DEV_ID_E823L_BACKPLANE:
     258                 :            :         case ICE_DEV_ID_E823L_SFP:
     259                 :            :         case ICE_DEV_ID_E823L_10G_BASE_T:
     260                 :            :         case ICE_DEV_ID_E823L_1GBE:
     261                 :            :         case ICE_DEV_ID_E823L_QSFP:
     262                 :            :         case ICE_DEV_ID_E823C_BACKPLANE:
     263                 :            :         case ICE_DEV_ID_E823C_QSFP:
     264                 :            :         case ICE_DEV_ID_E823C_SFP:
     265                 :            :         case ICE_DEV_ID_E823C_10G_BASE_T:
     266                 :            :         case ICE_DEV_ID_E823C_SGMII:
     267                 :            :                 return true;
     268                 :          0 :         default:
     269                 :          0 :                 return false;
     270                 :            :         }
     271                 :            : }
     272                 :            : 
     273                 :            : /**
     274                 :            :  * ice_clear_pf_cfg - Clear PF configuration
     275                 :            :  * @hw: pointer to the hardware structure
     276                 :            :  *
     277                 :            :  * Clears any existing PF configuration (VSIs, VSI lists, switch rules, port
     278                 :            :  * configuration, flow director filters, etc.).
     279                 :            :  */
     280                 :          0 : enum ice_status ice_clear_pf_cfg(struct ice_hw *hw)
     281                 :            : {
     282                 :            :         struct ice_aq_desc desc;
     283                 :            : 
     284                 :          0 :         ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_clear_pf_cfg);
     285                 :            : 
     286                 :          0 :         return ice_aq_send_cmd(hw, &desc, NULL, 0, NULL);
     287                 :            : }
     288                 :            : 
     289                 :            : /**
     290                 :            :  * ice_aq_manage_mac_read - manage MAC address read command
     291                 :            :  * @hw: pointer to the HW struct
     292                 :            :  * @buf: a virtual buffer to hold the manage MAC read response
     293                 :            :  * @buf_size: Size of the virtual buffer
     294                 :            :  * @cd: pointer to command details structure or NULL
     295                 :            :  *
     296                 :            :  * This function is used to return per PF station MAC address (0x0107).
     297                 :            :  * NOTE: Upon successful completion of this command, MAC address information
     298                 :            :  * is returned in user specified buffer. Please interpret user specified
     299                 :            :  * buffer as "manage_mac_read" response.
     300                 :            :  * Response such as various MAC addresses are stored in HW struct (port.mac)
     301                 :            :  * ice_discover_dev_caps is expected to be called before this function is
     302                 :            :  * called.
     303                 :            :  */
     304                 :            : static enum ice_status
     305                 :          0 : ice_aq_manage_mac_read(struct ice_hw *hw, void *buf, u16 buf_size,
     306                 :            :                        struct ice_sq_cd *cd)
     307                 :            : {
     308                 :            :         struct ice_aqc_manage_mac_read_resp *resp;
     309                 :            :         struct ice_aqc_manage_mac_read *cmd;
     310                 :            :         struct ice_aq_desc desc;
     311                 :            :         enum ice_status status;
     312                 :            :         u16 flags;
     313                 :            :         u8 i;
     314                 :            : 
     315                 :            :         cmd = &desc.params.mac_read;
     316                 :            : 
     317         [ #  # ]:          0 :         if (buf_size < sizeof(*resp))
     318                 :            :                 return ICE_ERR_BUF_TOO_SHORT;
     319                 :            : 
     320                 :          0 :         ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_manage_mac_read);
     321                 :            : 
     322                 :          0 :         status = ice_aq_send_cmd(hw, &desc, buf, buf_size, cd);
     323         [ #  # ]:          0 :         if (status)
     324                 :            :                 return status;
     325                 :            : 
     326                 :            :         resp = (struct ice_aqc_manage_mac_read_resp *)buf;
     327                 :          0 :         flags = LE16_TO_CPU(cmd->flags) & ICE_AQC_MAN_MAC_READ_M;
     328                 :            : 
     329         [ #  # ]:          0 :         if (!(flags & ICE_AQC_MAN_MAC_LAN_ADDR_VALID)) {
     330         [ #  # ]:          0 :                 ice_debug(hw, ICE_DBG_LAN, "got invalid MAC address\n");
     331                 :          0 :                 return ICE_ERR_CFG;
     332                 :            :         }
     333                 :            : 
     334                 :            :         /* A single port can report up to two (LAN and WoL) addresses */
     335         [ #  # ]:          0 :         for (i = 0; i < cmd->num_addr; i++)
     336         [ #  # ]:          0 :                 if (resp[i].addr_type == ICE_AQC_MAN_MAC_ADDR_TYPE_LAN) {
     337         [ #  # ]:          0 :                         ice_memcpy(hw->port_info->mac.lan_addr,
     338                 :            :                                    resp[i].mac_addr, ETH_ALEN,
     339                 :            :                                    ICE_DMA_TO_NONDMA);
     340         [ #  # ]:          0 :                         ice_memcpy(hw->port_info->mac.perm_addr,
     341                 :            :                                    resp[i].mac_addr,
     342                 :            :                                    ETH_ALEN, ICE_DMA_TO_NONDMA);
     343                 :            :                         break;
     344                 :            :                 }
     345                 :            :         return ICE_SUCCESS;
     346                 :            : }
     347                 :            : 
     348                 :            : /**
     349                 :            :  * ice_aq_get_phy_caps - returns PHY capabilities
     350                 :            :  * @pi: port information structure
     351                 :            :  * @qual_mods: report qualified modules
     352                 :            :  * @report_mode: report mode capabilities
     353                 :            :  * @pcaps: structure for PHY capabilities to be filled
     354                 :            :  * @cd: pointer to command details structure or NULL
     355                 :            :  *
     356                 :            :  * Returns the various PHY capabilities supported on the Port (0x0600)
     357                 :            :  */
     358                 :            : enum ice_status
     359                 :          0 : ice_aq_get_phy_caps(struct ice_port_info *pi, bool qual_mods, u8 report_mode,
     360                 :            :                     struct ice_aqc_get_phy_caps_data *pcaps,
     361                 :            :                     struct ice_sq_cd *cd)
     362                 :            : {
     363                 :            :         struct ice_aqc_get_phy_caps *cmd;
     364                 :            :         u16 pcaps_size = sizeof(*pcaps);
     365                 :            :         struct ice_aq_desc desc;
     366                 :            :         enum ice_status status;
     367                 :            :         const char *prefix;
     368                 :            :         struct ice_hw *hw;
     369                 :            : 
     370                 :            :         cmd = &desc.params.get_phy;
     371                 :            : 
     372   [ #  #  #  #  :          0 :         if (!pcaps || (report_mode & ~ICE_AQC_REPORT_MODE_M) || !pi)
                   #  # ]
     373                 :            :                 return ICE_ERR_PARAM;
     374                 :          0 :         hw = pi->hw;
     375                 :            : 
     376   [ #  #  #  # ]:          0 :         if (report_mode == ICE_AQC_REPORT_DFLT_CFG &&
     377                 :          0 :             !ice_fw_supports_report_dflt_cfg(hw))
     378                 :            :                 return ICE_ERR_PARAM;
     379                 :            : 
     380                 :          0 :         ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_get_phy_caps);
     381                 :            : 
     382         [ #  # ]:          0 :         if (qual_mods)
     383                 :          0 :                 cmd->param0 |= CPU_TO_LE16(ICE_AQC_GET_PHY_RQM);
     384                 :            : 
     385                 :          0 :         cmd->param0 |= CPU_TO_LE16(report_mode);
     386                 :          0 :         status = ice_aq_send_cmd(hw, &desc, pcaps, pcaps_size, cd);
     387                 :            : 
     388         [ #  # ]:          0 :         ice_debug(hw, ICE_DBG_LINK, "get phy caps dump\n");
     389                 :            : 
     390         [ #  # ]:          0 :         if (report_mode == ICE_AQC_REPORT_TOPO_CAP_MEDIA)
     391                 :            :                 prefix = "phy_caps_media";
     392                 :            :         else if (report_mode == ICE_AQC_REPORT_TOPO_CAP_NO_MEDIA)
     393                 :            :                 prefix = "phy_caps_no_media";
     394                 :            :         else if (report_mode == ICE_AQC_REPORT_ACTIVE_CFG)
     395                 :            :                 prefix = "phy_caps_active";
     396                 :            :         else if (report_mode == ICE_AQC_REPORT_DFLT_CFG)
     397                 :            :                 prefix = "phy_caps_default";
     398                 :            :         else
     399                 :            :                 prefix = "phy_caps_invalid";
     400                 :            : 
     401                 :          0 :         ice_dump_phy_type_low(hw, LE64_TO_CPU(pcaps->phy_type_low), prefix);
     402                 :          0 :         ice_dump_phy_type_high(hw, LE64_TO_CPU(pcaps->phy_type_high), prefix);
     403                 :            : 
     404         [ #  # ]:          0 :         ice_debug(hw, ICE_DBG_LINK, "%s: report_mode = 0x%x\n",
     405                 :            :                   prefix, report_mode);
     406         [ #  # ]:          0 :         ice_debug(hw, ICE_DBG_LINK, "%s: caps = 0x%x\n", prefix, pcaps->caps);
     407         [ #  # ]:          0 :         ice_debug(hw, ICE_DBG_LINK, "%s: low_power_ctrl_an = 0x%x\n", prefix,
     408                 :            :                   pcaps->low_power_ctrl_an);
     409         [ #  # ]:          0 :         ice_debug(hw, ICE_DBG_LINK, "%s: eee_cap = 0x%x\n", prefix,
     410                 :            :                   pcaps->eee_cap);
     411         [ #  # ]:          0 :         ice_debug(hw, ICE_DBG_LINK, "%s: eeer_value = 0x%x\n", prefix,
     412                 :            :                   pcaps->eeer_value);
     413         [ #  # ]:          0 :         ice_debug(hw, ICE_DBG_LINK, "%s: link_fec_options = 0x%x\n", prefix,
     414                 :            :                   pcaps->link_fec_options);
     415         [ #  # ]:          0 :         ice_debug(hw, ICE_DBG_LINK, "%s: module_compliance_enforcement = 0x%x\n",
     416                 :            :                   prefix, pcaps->module_compliance_enforcement);
     417         [ #  # ]:          0 :         ice_debug(hw, ICE_DBG_LINK, "%s: extended_compliance_code = 0x%x\n",
     418                 :            :                   prefix, pcaps->extended_compliance_code);
     419         [ #  # ]:          0 :         ice_debug(hw, ICE_DBG_LINK, "%s: module_type[0] = 0x%x\n", prefix,
     420                 :            :                   pcaps->module_type[0]);
     421         [ #  # ]:          0 :         ice_debug(hw, ICE_DBG_LINK, "%s: module_type[1] = 0x%x\n", prefix,
     422                 :            :                   pcaps->module_type[1]);
     423         [ #  # ]:          0 :         ice_debug(hw, ICE_DBG_LINK, "%s: module_type[2] = 0x%x\n", prefix,
     424                 :            :                   pcaps->module_type[2]);
     425                 :            : 
     426         [ #  # ]:          0 :         if (status == ICE_SUCCESS && report_mode == ICE_AQC_REPORT_TOPO_CAP_MEDIA) {
     427                 :          0 :                 pi->phy.phy_type_low = LE64_TO_CPU(pcaps->phy_type_low);
     428                 :          0 :                 pi->phy.phy_type_high = LE64_TO_CPU(pcaps->phy_type_high);
     429         [ #  # ]:          0 :                 ice_memcpy(pi->phy.link_info.module_type, &pcaps->module_type,
     430                 :            :                            sizeof(pi->phy.link_info.module_type),
     431                 :            :                            ICE_NONDMA_TO_NONDMA);
     432                 :            :         }
     433                 :            : 
     434                 :            :         return status;
     435                 :            : }
     436                 :            : 
     437                 :            : /**
     438                 :            :  * ice_aq_get_netlist_node_pin
     439                 :            :  * @hw: pointer to the hw struct
     440                 :            :  * @cmd: get_link_topo_pin AQ structure
     441                 :            :  * @node_handle: output node handle parameter if node found
     442                 :            :  */
     443                 :            : enum ice_status
     444                 :          0 : ice_aq_get_netlist_node_pin(struct ice_hw *hw,
     445                 :            :                             struct ice_aqc_get_link_topo_pin *cmd,
     446                 :            :                             u16 *node_handle)
     447                 :            : {
     448                 :            :         struct ice_aq_desc desc;
     449                 :            : 
     450                 :          0 :         ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_get_link_topo_pin);
     451                 :          0 :         desc.params.get_link_topo_pin = *cmd;
     452                 :            : 
     453         [ #  # ]:          0 :         if (ice_aq_send_cmd(hw, &desc, NULL, 0, NULL))
     454                 :            :                 return ICE_ERR_NOT_SUPPORTED;
     455                 :            : 
     456         [ #  # ]:          0 :         if (node_handle)
     457                 :          0 :                 *node_handle =
     458                 :          0 :                         LE16_TO_CPU(desc.params.get_link_topo_pin.addr.handle);
     459                 :            : 
     460                 :            :         return ICE_SUCCESS;
     461                 :            : }
     462                 :            : 
     463                 :            : /**
     464                 :            :  * ice_aq_get_netlist_node
     465                 :            :  * @hw: pointer to the hw struct
     466                 :            :  * @cmd: get_link_topo AQ structure
     467                 :            :  * @node_part_number: output node part number if node found
     468                 :            :  * @node_handle: output node handle parameter if node found
     469                 :            :  */
     470                 :            : enum ice_status
     471                 :          0 : ice_aq_get_netlist_node(struct ice_hw *hw, struct ice_aqc_get_link_topo *cmd,
     472                 :            :                         u8 *node_part_number, u16 *node_handle)
     473                 :            : {
     474                 :            :         struct ice_aq_desc desc;
     475                 :            : 
     476                 :          0 :         ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_get_link_topo);
     477                 :          0 :         desc.params.get_link_topo = *cmd;
     478                 :            : 
     479         [ #  # ]:          0 :         if (ice_aq_send_cmd(hw, &desc, NULL, 0, NULL))
     480                 :            :                 return ICE_ERR_NOT_SUPPORTED;
     481                 :            : 
     482         [ #  # ]:          0 :         if (node_handle)
     483                 :          0 :                 *node_handle =
     484                 :          0 :                         LE16_TO_CPU(desc.params.get_link_topo.addr.handle);
     485         [ #  # ]:          0 :         if (node_part_number)
     486                 :          0 :                 *node_part_number = desc.params.get_link_topo.node_part_num;
     487                 :            : 
     488                 :            :         return ICE_SUCCESS;
     489                 :            : }
     490                 :            : 
     491                 :            : #define MAX_NETLIST_SIZE 10
     492                 :            : /**
     493                 :            :  * ice_find_netlist_node
     494                 :            :  * @hw: pointer to the hw struct
     495                 :            :  * @node_type_ctx: type of netlist node to look for
     496                 :            :  * @node_part_number: node part number to look for
     497                 :            :  * @node_handle: output parameter if node found - optional
     498                 :            :  *
     499                 :            :  * Find and return the node handle for a given node type and part number in the
     500                 :            :  * netlist. When found ICE_SUCCESS is returned, ICE_ERR_DOES_NOT_EXIST
     501                 :            :  * otherwise. If node_handle provided, it would be set to found node handle.
     502                 :            :  */
     503                 :            : enum ice_status
     504                 :          0 : ice_find_netlist_node(struct ice_hw *hw, u8 node_type_ctx, u8 node_part_number,
     505                 :            :                       u16 *node_handle)
     506                 :            : {
     507                 :            :         struct ice_aqc_get_link_topo cmd;
     508                 :            :         u8 rec_node_part_number;
     509                 :            :         u16 rec_node_handle;
     510                 :            :         u8 idx;
     511                 :            : 
     512         [ #  # ]:          0 :         for (idx = 0; idx < MAX_NETLIST_SIZE; idx++) {
     513                 :            :                 enum ice_status status;
     514                 :            : 
     515                 :            :                 memset(&cmd, 0, sizeof(cmd));
     516                 :            : 
     517                 :          0 :                 cmd.addr.topo_params.node_type_ctx =
     518                 :            :                         (node_type_ctx << ICE_AQC_LINK_TOPO_NODE_TYPE_S);
     519                 :          0 :                 cmd.addr.topo_params.index = idx;
     520                 :            : 
     521                 :          0 :                 status = ice_aq_get_netlist_node(hw, &cmd,
     522                 :            :                                                  &rec_node_part_number,
     523                 :            :                                                  &rec_node_handle);
     524         [ #  # ]:          0 :                 if (status)
     525                 :          0 :                         return status;
     526                 :            : 
     527         [ #  # ]:          0 :                 if (rec_node_part_number == node_part_number) {
     528         [ #  # ]:          0 :                         if (node_handle)
     529                 :          0 :                                 *node_handle = rec_node_handle;
     530                 :          0 :                         return ICE_SUCCESS;
     531                 :            :                 }
     532                 :            :         }
     533                 :            : 
     534                 :            :         return ICE_ERR_DOES_NOT_EXIST;
     535                 :            : }
     536                 :            : 
     537                 :            : /**
     538                 :            :  * ice_is_media_cage_present
     539                 :            :  * @pi: port information structure
     540                 :            :  *
     541                 :            :  * Returns true if media cage is present, else false. If no cage, then
     542                 :            :  * media type is backplane or BASE-T.
     543                 :            :  */
     544                 :          0 : static bool ice_is_media_cage_present(struct ice_port_info *pi)
     545                 :            : {
     546                 :            :         struct ice_aqc_get_link_topo *cmd;
     547                 :            :         struct ice_aq_desc desc;
     548                 :            : 
     549                 :            :         cmd = &desc.params.get_link_topo;
     550                 :            : 
     551                 :          0 :         ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_get_link_topo);
     552                 :            : 
     553                 :            :         cmd->addr.topo_params.node_type_ctx =
     554                 :            :                 (ICE_AQC_LINK_TOPO_NODE_CTX_PORT <<
     555                 :            :                  ICE_AQC_LINK_TOPO_NODE_CTX_S);
     556                 :            : 
     557                 :            :         /* set node type */
     558                 :          0 :         cmd->addr.topo_params.node_type_ctx |=
     559                 :            :                 (ICE_AQC_LINK_TOPO_NODE_TYPE_M &
     560                 :            :                  ICE_AQC_LINK_TOPO_NODE_TYPE_CAGE);
     561                 :            : 
     562                 :            :         /* Node type cage can be used to determine if cage is present. If AQC
     563                 :            :          * returns error (ENOENT), then no cage present. If no cage present then
     564                 :            :          * connection type is backplane or BASE-T.
     565                 :            :          */
     566                 :          0 :         return ice_aq_get_netlist_node(pi->hw, cmd, NULL, NULL);
     567                 :            : }
     568                 :            : 
     569                 :            : /**
     570                 :            :  * ice_get_media_type - Gets media type
     571                 :            :  * @pi: port information structure
     572                 :            :  */
     573                 :          0 : static enum ice_media_type ice_get_media_type(struct ice_port_info *pi)
     574                 :            : {
     575                 :            :         struct ice_link_status *hw_link_info;
     576                 :            : 
     577         [ #  # ]:          0 :         if (!pi)
     578                 :            :                 return ICE_MEDIA_UNKNOWN;
     579                 :            : 
     580                 :            :         hw_link_info = &pi->phy.link_info;
     581   [ #  #  #  # ]:          0 :         if (hw_link_info->phy_type_low && hw_link_info->phy_type_high)
     582                 :            :                 /* If more than one media type is selected, report unknown */
     583                 :            :                 return ICE_MEDIA_UNKNOWN;
     584                 :            : 
     585         [ #  # ]:          0 :         if (hw_link_info->phy_type_low) {
     586                 :            :                 /* 1G SGMII is a special case where some DA cable PHYs
     587                 :            :                  * may show this as an option when it really shouldn't
     588                 :            :                  * be since SGMII is meant to be between a MAC and a PHY
     589                 :            :                  * in a backplane. Try to detect this case and handle it
     590                 :            :                  */
     591         [ #  # ]:          0 :                 if (hw_link_info->phy_type_low == ICE_PHY_TYPE_LOW_1G_SGMII &&
     592                 :          0 :                     (hw_link_info->module_type[ICE_AQC_MOD_TYPE_IDENT] ==
     593         [ #  # ]:          0 :                     ICE_AQC_MOD_TYPE_BYTE1_SFP_PLUS_CU_ACTIVE ||
     594                 :            :                     hw_link_info->module_type[ICE_AQC_MOD_TYPE_IDENT] ==
     595                 :            :                     ICE_AQC_MOD_TYPE_BYTE1_SFP_PLUS_CU_PASSIVE))
     596                 :            :                         return ICE_MEDIA_DA;
     597                 :            : 
     598   [ #  #  #  #  :          0 :                 switch (hw_link_info->phy_type_low) {
                #  #  # ]
     599                 :          0 :                 case ICE_PHY_TYPE_LOW_1000BASE_SX:
     600                 :            :                 case ICE_PHY_TYPE_LOW_1000BASE_LX:
     601                 :            :                 case ICE_PHY_TYPE_LOW_10GBASE_SR:
     602                 :            :                 case ICE_PHY_TYPE_LOW_10GBASE_LR:
     603                 :            :                 case ICE_PHY_TYPE_LOW_25GBASE_SR:
     604                 :            :                 case ICE_PHY_TYPE_LOW_25GBASE_LR:
     605                 :            :                 case ICE_PHY_TYPE_LOW_40GBASE_SR4:
     606                 :            :                 case ICE_PHY_TYPE_LOW_40GBASE_LR4:
     607                 :            :                 case ICE_PHY_TYPE_LOW_50GBASE_SR2:
     608                 :            :                 case ICE_PHY_TYPE_LOW_50GBASE_LR2:
     609                 :            :                 case ICE_PHY_TYPE_LOW_50GBASE_SR:
     610                 :            :                 case ICE_PHY_TYPE_LOW_50GBASE_FR:
     611                 :            :                 case ICE_PHY_TYPE_LOW_50GBASE_LR:
     612                 :            :                 case ICE_PHY_TYPE_LOW_100GBASE_SR4:
     613                 :            :                 case ICE_PHY_TYPE_LOW_100GBASE_LR4:
     614                 :            :                 case ICE_PHY_TYPE_LOW_100GBASE_SR2:
     615                 :            :                 case ICE_PHY_TYPE_LOW_100GBASE_DR:
     616                 :          0 :                         return ICE_MEDIA_FIBER;
     617                 :          0 :                 case ICE_PHY_TYPE_LOW_10G_SFI_AOC_ACC:
     618                 :            :                 case ICE_PHY_TYPE_LOW_25G_AUI_AOC_ACC:
     619                 :            :                 case ICE_PHY_TYPE_LOW_40G_XLAUI_AOC_ACC:
     620                 :            :                 case ICE_PHY_TYPE_LOW_50G_LAUI2_AOC_ACC:
     621                 :            :                 case ICE_PHY_TYPE_LOW_50G_AUI2_AOC_ACC:
     622                 :            :                 case ICE_PHY_TYPE_LOW_50G_AUI1_AOC_ACC:
     623                 :            :                 case ICE_PHY_TYPE_LOW_100G_CAUI4_AOC_ACC:
     624                 :            :                 case ICE_PHY_TYPE_LOW_100G_AUI4_AOC_ACC:
     625                 :          0 :                         return ICE_MEDIA_FIBER;
     626                 :          0 :                 case ICE_PHY_TYPE_LOW_100BASE_TX:
     627                 :            :                 case ICE_PHY_TYPE_LOW_1000BASE_T:
     628                 :            :                 case ICE_PHY_TYPE_LOW_2500BASE_T:
     629                 :            :                 case ICE_PHY_TYPE_LOW_5GBASE_T:
     630                 :            :                 case ICE_PHY_TYPE_LOW_10GBASE_T:
     631                 :            :                 case ICE_PHY_TYPE_LOW_25GBASE_T:
     632                 :          0 :                         return ICE_MEDIA_BASET;
     633                 :          0 :                 case ICE_PHY_TYPE_LOW_10G_SFI_DA:
     634                 :            :                 case ICE_PHY_TYPE_LOW_25GBASE_CR:
     635                 :            :                 case ICE_PHY_TYPE_LOW_25GBASE_CR_S:
     636                 :            :                 case ICE_PHY_TYPE_LOW_25GBASE_CR1:
     637                 :            :                 case ICE_PHY_TYPE_LOW_40GBASE_CR4:
     638                 :            :                 case ICE_PHY_TYPE_LOW_50GBASE_CR2:
     639                 :            :                 case ICE_PHY_TYPE_LOW_50GBASE_CP:
     640                 :            :                 case ICE_PHY_TYPE_LOW_100GBASE_CR4:
     641                 :            :                 case ICE_PHY_TYPE_LOW_100GBASE_CR_PAM4:
     642                 :            :                 case ICE_PHY_TYPE_LOW_100GBASE_CP2:
     643                 :          0 :                         return ICE_MEDIA_DA;
     644                 :          0 :                 case ICE_PHY_TYPE_LOW_25G_AUI_C2C:
     645                 :            :                 case ICE_PHY_TYPE_LOW_40G_XLAUI:
     646                 :            :                 case ICE_PHY_TYPE_LOW_50G_LAUI2:
     647                 :            :                 case ICE_PHY_TYPE_LOW_50G_AUI2:
     648                 :            :                 case ICE_PHY_TYPE_LOW_50G_AUI1:
     649                 :            :                 case ICE_PHY_TYPE_LOW_100G_AUI4:
     650                 :            :                 case ICE_PHY_TYPE_LOW_100G_CAUI4:
     651         [ #  # ]:          0 :                         if (ice_is_media_cage_present(pi))
     652                 :            :                                 return ICE_MEDIA_AUI;
     653                 :            :                         /* fall-through */
     654                 :            :                 case ICE_PHY_TYPE_LOW_1000BASE_KX:
     655                 :            :                 case ICE_PHY_TYPE_LOW_2500BASE_KX:
     656                 :            :                 case ICE_PHY_TYPE_LOW_2500BASE_X:
     657                 :            :                 case ICE_PHY_TYPE_LOW_5GBASE_KR:
     658                 :            :                 case ICE_PHY_TYPE_LOW_10GBASE_KR_CR1:
     659                 :            :                 case ICE_PHY_TYPE_LOW_10G_SFI_C2C:
     660                 :            :                 case ICE_PHY_TYPE_LOW_25GBASE_KR:
     661                 :            :                 case ICE_PHY_TYPE_LOW_25GBASE_KR1:
     662                 :            :                 case ICE_PHY_TYPE_LOW_25GBASE_KR_S:
     663                 :            :                 case ICE_PHY_TYPE_LOW_40GBASE_KR4:
     664                 :            :                 case ICE_PHY_TYPE_LOW_50GBASE_KR_PAM4:
     665                 :            :                 case ICE_PHY_TYPE_LOW_50GBASE_KR2:
     666                 :            :                 case ICE_PHY_TYPE_LOW_100GBASE_KR4:
     667                 :            :                 case ICE_PHY_TYPE_LOW_100GBASE_KR_PAM4:
     668                 :          0 :                         return ICE_MEDIA_BACKPLANE;
     669                 :            :                 }
     670                 :            :         } else {
     671   [ #  #  #  # ]:          0 :                 switch (hw_link_info->phy_type_high) {
     672                 :          0 :                 case ICE_PHY_TYPE_HIGH_100G_AUI2:
     673                 :            :                 case ICE_PHY_TYPE_HIGH_100G_CAUI2:
     674         [ #  # ]:          0 :                         if (ice_is_media_cage_present(pi))
     675                 :            :                                 return ICE_MEDIA_AUI;
     676                 :            :                         /* fall-through */
     677                 :            :                 case ICE_PHY_TYPE_HIGH_100GBASE_KR2_PAM4:
     678                 :          0 :                         return ICE_MEDIA_BACKPLANE;
     679                 :          0 :                 case ICE_PHY_TYPE_HIGH_100G_CAUI2_AOC_ACC:
     680                 :            :                 case ICE_PHY_TYPE_HIGH_100G_AUI2_AOC_ACC:
     681                 :          0 :                         return ICE_MEDIA_FIBER;
     682                 :            :                 }
     683                 :            :         }
     684                 :            :         return ICE_MEDIA_UNKNOWN;
     685                 :            : }
     686                 :            : 
     687                 :            : /**
     688                 :            :  * ice_aq_get_link_info
     689                 :            :  * @pi: port information structure
     690                 :            :  * @ena_lse: enable/disable LinkStatusEvent reporting
     691                 :            :  * @link: pointer to link status structure - optional
     692                 :            :  * @cd: pointer to command details structure or NULL
     693                 :            :  *
     694                 :            :  * Get Link Status (0x607). Returns the link status of the adapter.
     695                 :            :  */
     696                 :            : enum ice_status
     697                 :          0 : ice_aq_get_link_info(struct ice_port_info *pi, bool ena_lse,
     698                 :            :                      struct ice_link_status *link, struct ice_sq_cd *cd)
     699                 :            : {
     700                 :          0 :         struct ice_aqc_get_link_status_data link_data = { 0 };
     701                 :            :         struct ice_aqc_get_link_status *resp;
     702                 :            :         struct ice_link_status *li_old, *li;
     703                 :            :         enum ice_media_type *hw_media_type;
     704                 :            :         struct ice_fc_info *hw_fc_info;
     705                 :            :         bool tx_pause, rx_pause;
     706                 :            :         struct ice_aq_desc desc;
     707                 :            :         enum ice_status status;
     708                 :            :         struct ice_hw *hw;
     709                 :            :         u16 cmd_flags;
     710                 :            : 
     711         [ #  # ]:          0 :         if (!pi)
     712                 :            :                 return ICE_ERR_PARAM;
     713                 :          0 :         hw = pi->hw;
     714                 :            :         li_old = &pi->phy.link_info_old;
     715                 :            :         hw_media_type = &pi->phy.media_type;
     716                 :            :         li = &pi->phy.link_info;
     717                 :            :         hw_fc_info = &pi->fc;
     718                 :            : 
     719                 :          0 :         ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_get_link_status);
     720         [ #  # ]:          0 :         cmd_flags = (ena_lse) ? ICE_AQ_LSE_ENA : ICE_AQ_LSE_DIS;
     721                 :            :         resp = &desc.params.get_link_status;
     722                 :          0 :         resp->cmd_flags = CPU_TO_LE16(cmd_flags);
     723                 :          0 :         resp->lport_num = pi->lport;
     724                 :            : 
     725                 :          0 :         status = ice_aq_send_cmd(hw, &desc, &link_data, sizeof(link_data), cd);
     726                 :            : 
     727         [ #  # ]:          0 :         if (status != ICE_SUCCESS)
     728                 :            :                 return status;
     729                 :            : 
     730                 :            :         /* save off old link status information */
     731                 :          0 :         *li_old = *li;
     732                 :            : 
     733                 :            :         /* update current link status information */
     734                 :          0 :         li->link_speed = LE16_TO_CPU(link_data.link_speed);
     735                 :          0 :         li->phy_type_low = LE64_TO_CPU(link_data.phy_type_low);
     736                 :          0 :         li->phy_type_high = LE64_TO_CPU(link_data.phy_type_high);
     737                 :          0 :         *hw_media_type = ice_get_media_type(pi);
     738                 :          0 :         li->link_info = link_data.link_info;
     739                 :          0 :         li->link_cfg_err = link_data.link_cfg_err;
     740                 :          0 :         li->an_info = link_data.an_info;
     741                 :          0 :         li->ext_info = link_data.ext_info;
     742                 :          0 :         li->max_frame_size = LE16_TO_CPU(link_data.max_frame_size);
     743                 :          0 :         li->fec_info = link_data.cfg & ICE_AQ_FEC_MASK;
     744                 :          0 :         li->topo_media_conflict = link_data.topo_media_conflict;
     745                 :          0 :         li->pacing = link_data.cfg & (ICE_AQ_CFG_PACING_M |
     746                 :            :                                       ICE_AQ_CFG_PACING_TYPE_M);
     747                 :            : 
     748                 :            :         /* update fc info */
     749                 :          0 :         tx_pause = !!(link_data.an_info & ICE_AQ_LINK_PAUSE_TX);
     750                 :          0 :         rx_pause = !!(link_data.an_info & ICE_AQ_LINK_PAUSE_RX);
     751         [ #  # ]:          0 :         if (tx_pause && rx_pause)
     752                 :          0 :                 hw_fc_info->current_mode = ICE_FC_FULL;
     753         [ #  # ]:          0 :         else if (tx_pause)
     754                 :          0 :                 hw_fc_info->current_mode = ICE_FC_TX_PAUSE;
     755         [ #  # ]:          0 :         else if (rx_pause)
     756                 :          0 :                 hw_fc_info->current_mode = ICE_FC_RX_PAUSE;
     757                 :            :         else
     758                 :          0 :                 hw_fc_info->current_mode = ICE_FC_NONE;
     759                 :            : 
     760                 :          0 :         li->lse_ena = !!(resp->cmd_flags & CPU_TO_LE16(ICE_AQ_LSE_IS_ENABLED));
     761                 :            : 
     762         [ #  # ]:          0 :         ice_debug(hw, ICE_DBG_LINK, "get link info\n");
     763         [ #  # ]:          0 :         ice_debug(hw, ICE_DBG_LINK, "      link_speed = 0x%x\n", li->link_speed);
     764         [ #  # ]:          0 :         ice_debug(hw, ICE_DBG_LINK, "      phy_type_low = 0x%llx\n",
     765                 :            :                   (unsigned long long)li->phy_type_low);
     766         [ #  # ]:          0 :         ice_debug(hw, ICE_DBG_LINK, "      phy_type_high = 0x%llx\n",
     767                 :            :                   (unsigned long long)li->phy_type_high);
     768         [ #  # ]:          0 :         ice_debug(hw, ICE_DBG_LINK, "      media_type = 0x%x\n", *hw_media_type);
     769         [ #  # ]:          0 :         ice_debug(hw, ICE_DBG_LINK, "      link_info = 0x%x\n", li->link_info);
     770         [ #  # ]:          0 :         ice_debug(hw, ICE_DBG_LINK, "      link_cfg_err = 0x%x\n", li->link_cfg_err);
     771         [ #  # ]:          0 :         ice_debug(hw, ICE_DBG_LINK, "      an_info = 0x%x\n", li->an_info);
     772         [ #  # ]:          0 :         ice_debug(hw, ICE_DBG_LINK, "      ext_info = 0x%x\n", li->ext_info);
     773         [ #  # ]:          0 :         ice_debug(hw, ICE_DBG_LINK, "      fec_info = 0x%x\n", li->fec_info);
     774         [ #  # ]:          0 :         ice_debug(hw, ICE_DBG_LINK, "      lse_ena = 0x%x\n", li->lse_ena);
     775         [ #  # ]:          0 :         ice_debug(hw, ICE_DBG_LINK, "      max_frame = 0x%x\n",
     776                 :            :                   li->max_frame_size);
     777         [ #  # ]:          0 :         ice_debug(hw, ICE_DBG_LINK, "      pacing = 0x%x\n", li->pacing);
     778                 :            : 
     779                 :            :         /* save link status information */
     780         [ #  # ]:          0 :         if (link)
     781                 :          0 :                 *link = *li;
     782                 :            : 
     783                 :            :         /* flag cleared so calling functions don't call AQ again */
     784                 :          0 :         pi->phy.get_link_info = false;
     785                 :            : 
     786                 :          0 :         return ICE_SUCCESS;
     787                 :            : }
     788                 :            : 
     789                 :            : /**
     790                 :            :  * ice_fill_tx_timer_and_fc_thresh
     791                 :            :  * @hw: pointer to the HW struct
     792                 :            :  * @cmd: pointer to MAC cfg structure
     793                 :            :  *
     794                 :            :  * Add Tx timer and FC refresh threshold info to Set MAC Config AQ command
     795                 :            :  * descriptor
     796                 :            :  */
     797                 :            : static void
     798                 :            : ice_fill_tx_timer_and_fc_thresh(struct ice_hw *hw,
     799                 :            :                                 struct ice_aqc_set_mac_cfg *cmd)
     800                 :            : {
     801                 :            :         u16 fc_thres_val, tx_timer_val;
     802                 :            :         u32 val;
     803                 :            : 
     804                 :            :         /* We read back the transmit timer and fc threshold value of
     805                 :            :          * LFC. Thus, we will use index =
     806                 :            :          * PRTMAC_HSEC_CTL_TX_PAUSE_QUANTA_MAX_INDEX.
     807                 :            :          *
     808                 :            :          * Also, because we are operating on transmit timer and fc
     809                 :            :          * threshold of LFC, we don't turn on any bit in tx_tmr_priority
     810                 :            :          */
     811                 :            : #define IDX_OF_LFC PRTMAC_HSEC_CTL_TX_PAUSE_QUANTA_MAX_INDEX
     812                 :            : 
     813                 :            :         /* Retrieve the transmit timer */
     814                 :          0 :         val = rd32(hw, PRTMAC_HSEC_CTL_TX_PAUSE_QUANTA(IDX_OF_LFC));
     815                 :          0 :         tx_timer_val = val &
     816                 :            :                 PRTMAC_HSEC_CTL_TX_PAUSE_QUANTA_HSEC_CTL_TX_PAUSE_QUANTA_M;
     817                 :          0 :         cmd->tx_tmr_value = CPU_TO_LE16(tx_timer_val);
     818                 :            : 
     819                 :            :         /* Retrieve the fc threshold */
     820                 :          0 :         val = rd32(hw, PRTMAC_HSEC_CTL_TX_PAUSE_REFRESH_TIMER(IDX_OF_LFC));
     821                 :          0 :         fc_thres_val = val & PRTMAC_HSEC_CTL_TX_PAUSE_REFRESH_TIMER_M;
     822                 :            : 
     823                 :          0 :         cmd->fc_refresh_threshold = CPU_TO_LE16(fc_thres_val);
     824                 :            : }
     825                 :            : 
     826                 :            : /**
     827                 :            :  * ice_aq_set_mac_cfg
     828                 :            :  * @hw: pointer to the HW struct
     829                 :            :  * @max_frame_size: Maximum Frame Size to be supported
     830                 :            :  * @auto_drop: Tell HW to drop packets if TC queue is blocked
     831                 :            :  * @cd: pointer to command details structure or NULL
     832                 :            :  *
     833                 :            :  * Set MAC configuration (0x0603)
     834                 :            :  */
     835                 :            : enum ice_status
     836                 :          0 : ice_aq_set_mac_cfg(struct ice_hw *hw, u16 max_frame_size, bool auto_drop,
     837                 :            :                    struct ice_sq_cd *cd)
     838                 :            : {
     839                 :            :         struct ice_aqc_set_mac_cfg *cmd;
     840                 :            :         struct ice_aq_desc desc;
     841                 :            : 
     842                 :            :         cmd = &desc.params.set_mac_cfg;
     843                 :            : 
     844         [ #  # ]:          0 :         if (max_frame_size == 0)
     845                 :            :                 return ICE_ERR_PARAM;
     846                 :            : 
     847                 :          0 :         ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_set_mac_cfg);
     848                 :            : 
     849                 :          0 :         cmd->max_frame_size = CPU_TO_LE16(max_frame_size);
     850                 :            : 
     851   [ #  #  #  # ]:          0 :         if (ice_is_fw_auto_drop_supported(hw) && auto_drop)
     852                 :          0 :                 cmd->drop_opts |= ICE_AQ_SET_MAC_AUTO_DROP_BLOCKING_PKTS;
     853                 :            :         ice_fill_tx_timer_and_fc_thresh(hw, cmd);
     854                 :            : 
     855                 :          0 :         return ice_aq_send_cmd(hw, &desc, NULL, 0, cd);
     856                 :            : }
     857                 :            : 
     858                 :            : /**
     859                 :            :  * ice_init_fltr_mgmt_struct - initializes filter management list and locks
     860                 :            :  * @hw: pointer to the HW struct
     861                 :            :  */
     862                 :          0 : enum ice_status ice_init_fltr_mgmt_struct(struct ice_hw *hw)
     863                 :            : {
     864                 :            :         struct ice_switch_info *sw;
     865                 :            :         enum ice_status status;
     866                 :            : 
     867                 :          0 :         hw->switch_info = (struct ice_switch_info *)
     868                 :          0 :                           ice_malloc(hw, sizeof(*hw->switch_info));
     869                 :            : 
     870                 :            :         sw = hw->switch_info;
     871                 :            : 
     872         [ #  # ]:          0 :         if (!sw)
     873                 :            :                 return ICE_ERR_NO_MEMORY;
     874                 :            : 
     875                 :          0 :         INIT_LIST_HEAD(&sw->vsi_list_map_head);
     876                 :          0 :         sw->prof_res_bm_init = 0;
     877                 :            : 
     878                 :          0 :         status = ice_init_def_sw_recp(hw, &hw->switch_info->recp_list);
     879         [ #  # ]:          0 :         if (status) {
     880                 :          0 :                 ice_free(hw, hw->switch_info);
     881                 :          0 :                 return status;
     882                 :            :         }
     883                 :            :         return ICE_SUCCESS;
     884                 :            : }
     885                 :            : 
     886                 :            : /**
     887                 :            :  * ice_cleanup_fltr_mgmt_single - clears single filter mngt struct
     888                 :            :  * @hw: pointer to the HW struct
     889                 :            :  * @sw: pointer to switch info struct for which function clears filters
     890                 :            :  */
     891                 :            : static void
     892                 :          0 : ice_cleanup_fltr_mgmt_single(struct ice_hw *hw, struct ice_switch_info *sw)
     893                 :            : {
     894                 :            :         struct ice_vsi_list_map_info *v_pos_map;
     895                 :            :         struct ice_vsi_list_map_info *v_tmp_map;
     896                 :            :         struct ice_sw_recipe *recps;
     897                 :            :         u8 i;
     898                 :            : 
     899         [ #  # ]:          0 :         if (!sw)
     900                 :            :                 return;
     901                 :            : 
     902   [ #  #  #  #  :          0 :         LIST_FOR_EACH_ENTRY_SAFE(v_pos_map, v_tmp_map, &sw->vsi_list_map_head,
          #  #  #  #  #  
                      # ]
     903                 :            :                                  ice_vsi_list_map_info, list_entry) {
     904         [ #  # ]:          0 :                 LIST_DEL(&v_pos_map->list_entry);
     905                 :          0 :                 ice_free(hw, v_pos_map);
     906                 :            :         }
     907                 :          0 :         recps = sw->recp_list;
     908         [ #  # ]:          0 :         for (i = 0; i < ICE_MAX_NUM_RECIPES; i++) {
     909                 :            :                 struct ice_recp_grp_entry *rg_entry, *tmprg_entry;
     910                 :            : 
     911                 :          0 :                 recps[i].root_rid = i;
     912   [ #  #  #  #  :          0 :                 LIST_FOR_EACH_ENTRY_SAFE(rg_entry, tmprg_entry,
          #  #  #  #  #  
                      # ]
     913                 :            :                                          &recps[i].rg_list, ice_recp_grp_entry,
     914                 :            :                                          l_entry) {
     915         [ #  # ]:          0 :                         LIST_DEL(&rg_entry->l_entry);
     916                 :          0 :                         ice_free(hw, rg_entry);
     917                 :            :                 }
     918                 :            : 
     919         [ #  # ]:          0 :                 if (recps[i].adv_rule) {
     920                 :            :                         struct ice_adv_fltr_mgmt_list_entry *tmp_entry;
     921                 :            :                         struct ice_adv_fltr_mgmt_list_entry *lst_itr;
     922                 :            : 
     923                 :            :                         ice_destroy_lock(&recps[i].filt_rule_lock);
     924   [ #  #  #  #  :          0 :                         LIST_FOR_EACH_ENTRY_SAFE(lst_itr, tmp_entry,
          #  #  #  #  #  
                      # ]
     925                 :            :                                                  &recps[i].filt_rules,
     926                 :            :                                                  ice_adv_fltr_mgmt_list_entry,
     927                 :            :                                                  list_entry) {
     928         [ #  # ]:          0 :                                 LIST_DEL(&lst_itr->list_entry);
     929                 :          0 :                                 ice_free(hw, lst_itr->lkups);
     930                 :          0 :                                 ice_free(hw, lst_itr);
     931                 :            :                         }
     932                 :            :                 } else {
     933                 :            :                         struct ice_fltr_mgmt_list_entry *lst_itr, *tmp_entry;
     934                 :            : 
     935                 :            :                         ice_destroy_lock(&recps[i].filt_rule_lock);
     936   [ #  #  #  #  :          0 :                         LIST_FOR_EACH_ENTRY_SAFE(lst_itr, tmp_entry,
          #  #  #  #  #  
                #  #  # ]
     937                 :            :                                                  &recps[i].filt_rules,
     938                 :            :                                                  ice_fltr_mgmt_list_entry,
     939                 :            :                                                  list_entry) {
     940         [ #  # ]:          0 :                                 LIST_DEL(&lst_itr->list_entry);
     941                 :          0 :                                 ice_free(hw, lst_itr);
     942                 :            :                         }
     943                 :            :                 }
     944         [ #  # ]:          0 :                 if (recps[i].root_buf)
     945                 :          0 :                         ice_free(hw, recps[i].root_buf);
     946                 :            :         }
     947                 :          0 :         ice_rm_sw_replay_rule_info(hw, sw);
     948                 :          0 :         ice_free(hw, sw->recp_list);
     949                 :          0 :         ice_free(hw, sw);
     950                 :            : }
     951                 :            : 
     952                 :            : /**
     953                 :            :  * ice_cleanup_fltr_mgmt_struct - cleanup filter management list and locks
     954                 :            :  * @hw: pointer to the HW struct
     955                 :            :  */
     956                 :          0 : void ice_cleanup_fltr_mgmt_struct(struct ice_hw *hw)
     957                 :            : {
     958                 :          0 :         ice_cleanup_fltr_mgmt_single(hw, hw->switch_info);
     959                 :          0 : }
     960                 :            : 
     961                 :            : /**
     962                 :            :  * ice_get_itr_intrl_gran
     963                 :            :  * @hw: pointer to the HW struct
     964                 :            :  *
     965                 :            :  * Determines the ITR/INTRL granularities based on the maximum aggregate
     966                 :            :  * bandwidth according to the device's configuration during power-on.
     967                 :            :  */
     968                 :            : static void ice_get_itr_intrl_gran(struct ice_hw *hw)
     969                 :            : {
     970                 :          0 :         u8 max_agg_bw = (rd32(hw, GL_PWR_MODE_CTL) &
     971                 :          0 :                          GL_PWR_MODE_CTL_CAR_MAX_BW_M) >>
     972                 :            :                         GL_PWR_MODE_CTL_CAR_MAX_BW_S;
     973                 :            : 
     974         [ #  # ]:          0 :         switch (max_agg_bw) {
     975                 :          0 :         case ICE_MAX_AGG_BW_200G:
     976                 :            :         case ICE_MAX_AGG_BW_100G:
     977                 :            :         case ICE_MAX_AGG_BW_50G:
     978                 :          0 :                 hw->itr_gran = ICE_ITR_GRAN_ABOVE_25;
     979                 :          0 :                 hw->intrl_gran = ICE_INTRL_GRAN_ABOVE_25;
     980                 :          0 :                 break;
     981                 :          0 :         case ICE_MAX_AGG_BW_25G:
     982                 :          0 :                 hw->itr_gran = ICE_ITR_GRAN_MAX_25;
     983                 :          0 :                 hw->intrl_gran = ICE_INTRL_GRAN_MAX_25;
     984                 :          0 :                 break;
     985                 :            :         }
     986                 :            : }
     987                 :            : 
     988                 :            : /**
     989                 :            :  * ice_print_rollback_msg - print FW rollback message
     990                 :            :  * @hw: pointer to the hardware structure
     991                 :            :  */
     992                 :          0 : void ice_print_rollback_msg(struct ice_hw *hw)
     993                 :            : {
     994                 :          0 :         char nvm_str[ICE_NVM_VER_LEN] = { 0 };
     995                 :            :         struct ice_orom_info *orom;
     996                 :            :         struct ice_nvm_info *nvm;
     997                 :            : 
     998                 :            :         orom = &hw->flash.orom;
     999                 :            :         nvm = &hw->flash.nvm;
    1000                 :            : 
    1001                 :          0 :         SNPRINTF(nvm_str, sizeof(nvm_str), "%x.%02x 0x%x %d.%d.%d",
    1002                 :          0 :                  nvm->major, nvm->minor, nvm->eetrack, orom->major,
    1003         [ #  # ]:          0 :                  orom->build, orom->patch);
    1004         [ #  # ]:          0 :         ice_warn(hw,
    1005                 :            :                  "Firmware rollback mode detected. Current version is NVM: %s, FW: %d.%d. Device may exhibit limited functionality. Refer to the Intel(R) Ethernet Adapters and Devices User Guide for details on firmware rollback mode\n",
    1006                 :            :                  nvm_str, hw->fw_maj_ver, hw->fw_min_ver);
    1007                 :          0 : }
    1008                 :            : 
    1009                 :            : /**
    1010                 :            :  * ice_set_umac_shared
    1011                 :            :  * @hw: pointer to the hw struct
    1012                 :            :  *
    1013                 :            :  * Set boolean flag to allow unicast MAC sharing
    1014                 :            :  */
    1015                 :          0 : void ice_set_umac_shared(struct ice_hw *hw)
    1016                 :            : {
    1017                 :          0 :         hw->umac_shared = true;
    1018                 :          0 : }
    1019                 :            : 
    1020                 :            : /**
    1021                 :            :  * ice_init_hw - main hardware initialization routine
    1022                 :            :  * @hw: pointer to the hardware structure
    1023                 :            :  */
    1024                 :          0 : enum ice_status ice_init_hw(struct ice_hw *hw)
    1025                 :            : {
    1026                 :            :         struct ice_aqc_get_phy_caps_data *pcaps;
    1027                 :            :         enum ice_status status;
    1028                 :            :         u16 mac_buf_len;
    1029                 :            :         void *mac_buf;
    1030                 :            : 
    1031         [ #  # ]:          0 :         ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);
    1032                 :            : 
    1033                 :            :         /* Set MAC type based on DeviceID */
    1034                 :          0 :         status = ice_set_mac_type(hw);
    1035         [ #  # ]:          0 :         if (status)
    1036                 :            :                 return status;
    1037                 :            : 
    1038                 :          0 :         hw->pf_id = (u8)(rd32(hw, PF_FUNC_RID) &
    1039                 :          0 :                          PF_FUNC_RID_FUNCTION_NUMBER_M) >>
    1040                 :            :                 PF_FUNC_RID_FUNCTION_NUMBER_S;
    1041                 :            : 
    1042                 :          0 :         status = ice_reset(hw, ICE_RESET_PFR);
    1043         [ #  # ]:          0 :         if (status)
    1044                 :            :                 return status;
    1045                 :            : 
    1046                 :            :         ice_get_itr_intrl_gran(hw);
    1047                 :            : 
    1048                 :          0 :         status = ice_create_all_ctrlq(hw);
    1049         [ #  # ]:          0 :         if (status)
    1050                 :          0 :                 goto err_unroll_cqinit;
    1051                 :            : 
    1052                 :          0 :         status = ice_init_nvm(hw);
    1053         [ #  # ]:          0 :         if (status)
    1054                 :          0 :                 goto err_unroll_cqinit;
    1055                 :            : 
    1056         [ #  # ]:          0 :         if (ice_get_fw_mode(hw) == ICE_FW_MODE_ROLLBACK)
    1057                 :          0 :                 ice_print_rollback_msg(hw);
    1058                 :            : 
    1059                 :          0 :         status = ice_clear_pf_cfg(hw);
    1060         [ #  # ]:          0 :         if (status)
    1061                 :          0 :                 goto err_unroll_cqinit;
    1062                 :            : 
    1063                 :            :         /* Set bit to enable Flow Director filters */
    1064                 :          0 :         wr32(hw, PFQF_FD_ENA, PFQF_FD_ENA_FD_ENA_M);
    1065                 :          0 :         INIT_LIST_HEAD(&hw->fdir_list_head);
    1066                 :            : 
    1067                 :          0 :         ice_clear_pxe_mode(hw);
    1068                 :            : 
    1069                 :          0 :         status = ice_get_caps(hw);
    1070         [ #  # ]:          0 :         if (status)
    1071                 :          0 :                 goto err_unroll_cqinit;
    1072                 :            : 
    1073                 :          0 :         hw->port_info = (struct ice_port_info *)
    1074                 :          0 :                         ice_malloc(hw, sizeof(*hw->port_info));
    1075         [ #  # ]:          0 :         if (!hw->port_info) {
    1076                 :            :                 status = ICE_ERR_NO_MEMORY;
    1077                 :          0 :                 goto err_unroll_cqinit;
    1078                 :            :         }
    1079                 :            : 
    1080                 :            :         /* set the back pointer to HW */
    1081                 :          0 :         hw->port_info->hw = hw;
    1082                 :            : 
    1083                 :            :         /* Initialize port_info struct with switch configuration data */
    1084                 :          0 :         status = ice_get_initial_sw_cfg(hw);
    1085         [ #  # ]:          0 :         if (status)
    1086                 :          0 :                 goto err_unroll_alloc;
    1087                 :            : 
    1088                 :          0 :         hw->evb_veb = true;
    1089                 :            :         /* Query the allocated resources for Tx scheduler */
    1090                 :          0 :         status = ice_sched_query_res_alloc(hw);
    1091         [ #  # ]:          0 :         if (status) {
    1092         [ #  # ]:          0 :                 ice_debug(hw, ICE_DBG_SCHED, "Failed to get scheduler allocated resources\n");
    1093                 :          0 :                 goto err_unroll_alloc;
    1094                 :            :         }
    1095                 :          0 :         ice_sched_get_psm_clk_freq(hw);
    1096                 :            : 
    1097                 :            :         /* Initialize port_info struct with scheduler data */
    1098                 :          0 :         status = ice_sched_init_port(hw->port_info);
    1099         [ #  # ]:          0 :         if (status)
    1100                 :          0 :                 goto err_unroll_sched;
    1101                 :            :         pcaps = (struct ice_aqc_get_phy_caps_data *)
    1102                 :          0 :                 ice_malloc(hw, sizeof(*pcaps));
    1103         [ #  # ]:          0 :         if (!pcaps) {
    1104                 :            :                 status = ICE_ERR_NO_MEMORY;
    1105                 :          0 :                 goto err_unroll_sched;
    1106                 :            :         }
    1107                 :            : 
    1108                 :            :         /* Initialize port_info struct with PHY capabilities */
    1109                 :          0 :         status = ice_aq_get_phy_caps(hw->port_info, false,
    1110                 :            :                                      ICE_AQC_REPORT_TOPO_CAP_MEDIA, pcaps, NULL);
    1111                 :          0 :         ice_free(hw, pcaps);
    1112         [ #  # ]:          0 :         if (status)
    1113         [ #  # ]:          0 :                 ice_warn(hw, "Get PHY capabilities failed status = %d, continuing anyway\n",
    1114                 :            :                          status);
    1115                 :            : 
    1116                 :            :         /* Initialize port_info struct with link information */
    1117                 :          0 :         status = ice_aq_get_link_info(hw->port_info, false, NULL, NULL);
    1118         [ #  # ]:          0 :         if (status)
    1119                 :          0 :                 goto err_unroll_sched;
    1120                 :            :         /* need a valid SW entry point to build a Tx tree */
    1121         [ #  # ]:          0 :         if (!hw->sw_entry_point_layer) {
    1122         [ #  # ]:          0 :                 ice_debug(hw, ICE_DBG_SCHED, "invalid sw entry point\n");
    1123                 :            :                 status = ICE_ERR_CFG;
    1124                 :          0 :                 goto err_unroll_sched;
    1125                 :            :         }
    1126                 :          0 :         INIT_LIST_HEAD(&hw->agg_list);
    1127                 :            :         /* Initialize max burst size */
    1128         [ #  # ]:          0 :         if (!hw->max_burst_size)
    1129                 :          0 :                 ice_cfg_rl_burst_size(hw, ICE_SCHED_DFLT_BURST_SIZE);
    1130                 :          0 :         status = ice_init_fltr_mgmt_struct(hw);
    1131         [ #  # ]:          0 :         if (status)
    1132                 :          0 :                 goto err_unroll_sched;
    1133                 :            : 
    1134                 :            :         /* Get MAC information */
    1135                 :            :         /* A single port can report up to two (LAN and WoL) addresses */
    1136                 :          0 :         mac_buf = ice_calloc(hw, 2,
    1137                 :            :                              sizeof(struct ice_aqc_manage_mac_read_resp));
    1138                 :            :         mac_buf_len = 2 * sizeof(struct ice_aqc_manage_mac_read_resp);
    1139                 :            : 
    1140         [ #  # ]:          0 :         if (!mac_buf) {
    1141                 :            :                 status = ICE_ERR_NO_MEMORY;
    1142                 :          0 :                 goto err_unroll_fltr_mgmt_struct;
    1143                 :            :         }
    1144                 :            : 
    1145                 :          0 :         status = ice_aq_manage_mac_read(hw, mac_buf, mac_buf_len, NULL);
    1146                 :          0 :         ice_free(hw, mac_buf);
    1147                 :            : 
    1148         [ #  # ]:          0 :         if (status)
    1149                 :          0 :                 goto err_unroll_fltr_mgmt_struct;
    1150                 :            : 
    1151                 :            :         /* enable jumbo frame support at MAC level */
    1152                 :          0 :         status = ice_aq_set_mac_cfg(hw, ICE_AQ_SET_MAC_FRAME_SIZE_MAX, false,
    1153                 :            :                                     NULL);
    1154         [ #  # ]:          0 :         if (status)
    1155                 :          0 :                 goto err_unroll_fltr_mgmt_struct;
    1156                 :            : 
    1157                 :            :         /* Obtain counter base index which would be used by flow director */
    1158                 :          0 :         status = ice_alloc_fd_res_cntr(hw, &hw->fd_ctr_base);
    1159         [ #  # ]:          0 :         if (status)
    1160                 :          0 :                 goto err_unroll_fltr_mgmt_struct;
    1161                 :          0 :         status = ice_init_hw_tbls(hw);
    1162         [ #  # ]:          0 :         if (status)
    1163                 :          0 :                 goto err_unroll_fltr_mgmt_struct;
    1164                 :            :         ice_init_lock(&hw->tnl_lock);
    1165                 :            : 
    1166                 :          0 :         return ICE_SUCCESS;
    1167                 :            : 
    1168                 :          0 : err_unroll_fltr_mgmt_struct:
    1169                 :          0 :         ice_cleanup_fltr_mgmt_struct(hw);
    1170                 :          0 : err_unroll_sched:
    1171                 :          0 :         ice_sched_cleanup_all(hw);
    1172                 :          0 : err_unroll_alloc:
    1173                 :          0 :         ice_free(hw, hw->port_info);
    1174                 :          0 :         hw->port_info = NULL;
    1175                 :          0 : err_unroll_cqinit:
    1176                 :          0 :         ice_destroy_all_ctrlq(hw);
    1177                 :          0 :         return status;
    1178                 :            : }
    1179                 :            : 
    1180                 :            : /**
    1181                 :            :  * ice_deinit_hw - unroll initialization operations done by ice_init_hw
    1182                 :            :  * @hw: pointer to the hardware structure
    1183                 :            :  *
    1184                 :            :  * This should be called only during nominal operation, not as a result of
    1185                 :            :  * ice_init_hw() failing since ice_init_hw() will take care of unrolling
    1186                 :            :  * applicable initializations if it fails for any reason.
    1187                 :            :  */
    1188                 :          0 : void ice_deinit_hw(struct ice_hw *hw)
    1189                 :            : {
    1190                 :          0 :         ice_free_fd_res_cntr(hw, hw->fd_ctr_base);
    1191                 :          0 :         ice_cleanup_fltr_mgmt_struct(hw);
    1192                 :            : 
    1193                 :          0 :         ice_sched_cleanup_all(hw);
    1194                 :          0 :         ice_sched_clear_agg(hw);
    1195                 :          0 :         ice_free_seg(hw);
    1196                 :          0 :         ice_free_hw_tbls(hw);
    1197                 :            :         ice_destroy_lock(&hw->tnl_lock);
    1198                 :            : 
    1199         [ #  # ]:          0 :         if (hw->port_info) {
    1200                 :          0 :                 ice_free(hw, hw->port_info);
    1201                 :          0 :                 hw->port_info = NULL;
    1202                 :            :         }
    1203                 :            : 
    1204                 :          0 :         ice_destroy_all_ctrlq(hw);
    1205                 :            : 
    1206                 :            :         /* Clear VSI contexts if not already cleared */
    1207                 :          0 :         ice_clear_all_vsi_ctx(hw);
    1208                 :          0 : }
    1209                 :            : 
    1210                 :            : /**
    1211                 :            :  * ice_check_reset - Check to see if a global reset is complete
    1212                 :            :  * @hw: pointer to the hardware structure
    1213                 :            :  */
    1214                 :          0 : enum ice_status ice_check_reset(struct ice_hw *hw)
    1215                 :            : {
    1216                 :            :         u32 cnt, reg = 0, grst_timeout, uld_mask;
    1217                 :            : 
    1218                 :            :         /* Poll for Device Active state in case a recent CORER, GLOBR,
    1219                 :            :          * or EMPR has occurred. The grst delay value is in 100ms units.
    1220                 :            :          * Add 1sec for outstanding AQ commands that can take a long time.
    1221                 :            :          */
    1222                 :          0 :         grst_timeout = ((rd32(hw, GLGEN_RSTCTL) & GLGEN_RSTCTL_GRSTDEL_M) >>
    1223                 :            :                         GLGEN_RSTCTL_GRSTDEL_S) + 10;
    1224                 :            : 
    1225         [ #  # ]:          0 :         for (cnt = 0; cnt < grst_timeout; cnt++) {
    1226                 :          0 :                 ice_msec_delay(100, true);
    1227                 :          0 :                 reg = rd32(hw, GLGEN_RSTAT);
    1228         [ #  # ]:          0 :                 if (!(reg & GLGEN_RSTAT_DEVSTATE_M))
    1229                 :            :                         break;
    1230                 :            :         }
    1231                 :            : 
    1232         [ #  # ]:          0 :         if (cnt == grst_timeout) {
    1233         [ #  # ]:          0 :                 ice_debug(hw, ICE_DBG_INIT, "Global reset polling failed to complete.\n");
    1234                 :          0 :                 return ICE_ERR_RESET_FAILED;
    1235                 :            :         }
    1236                 :            : 
    1237                 :            : #define ICE_RESET_DONE_MASK     (GLNVM_ULD_PCIER_DONE_M |\
    1238                 :            :                                  GLNVM_ULD_PCIER_DONE_1_M |\
    1239                 :            :                                  GLNVM_ULD_CORER_DONE_M |\
    1240                 :            :                                  GLNVM_ULD_GLOBR_DONE_M |\
    1241                 :            :                                  GLNVM_ULD_POR_DONE_M |\
    1242                 :            :                                  GLNVM_ULD_POR_DONE_1_M |\
    1243                 :            :                                  GLNVM_ULD_PCIER_DONE_2_M)
    1244                 :            : 
    1245                 :            :         uld_mask = ICE_RESET_DONE_MASK;
    1246                 :            : 
    1247                 :            :         /* Device is Active; check Global Reset processes are done */
    1248         [ #  # ]:          0 :         for (cnt = 0; cnt < ICE_PF_RESET_WAIT_COUNT; cnt++) {
    1249                 :          0 :                 reg = rd32(hw, GLNVM_ULD) & uld_mask;
    1250         [ #  # ]:          0 :                 if (reg == uld_mask) {
    1251         [ #  # ]:          0 :                         ice_debug(hw, ICE_DBG_INIT, "Global reset processes done. %d\n", cnt);
    1252                 :            :                         break;
    1253                 :            :                 }
    1254                 :          0 :                 ice_msec_delay(10, true);
    1255                 :            :         }
    1256                 :            : 
    1257         [ #  # ]:          0 :         if (cnt == ICE_PF_RESET_WAIT_COUNT) {
    1258         [ #  # ]:          0 :                 ice_debug(hw, ICE_DBG_INIT, "Wait for Reset Done timed out. GLNVM_ULD = 0x%x\n",
    1259                 :            :                           reg);
    1260                 :          0 :                 return ICE_ERR_RESET_FAILED;
    1261                 :            :         }
    1262                 :            : 
    1263                 :            :         return ICE_SUCCESS;
    1264                 :            : }
    1265                 :            : 
    1266                 :            : /**
    1267                 :            :  * ice_pf_reset - Reset the PF
    1268                 :            :  * @hw: pointer to the hardware structure
    1269                 :            :  *
    1270                 :            :  * If a global reset has been triggered, this function checks
    1271                 :            :  * for its completion and then issues the PF reset
    1272                 :            :  */
    1273                 :          0 : static enum ice_status ice_pf_reset(struct ice_hw *hw)
    1274                 :            : {
    1275                 :            :         u32 cnt, reg;
    1276                 :            : 
    1277                 :            :         /* If at function entry a global reset was already in progress, i.e.
    1278                 :            :          * state is not 'device active' or any of the reset done bits are not
    1279                 :            :          * set in GLNVM_ULD, there is no need for a PF Reset; poll until the
    1280                 :            :          * global reset is done.
    1281                 :            :          */
    1282         [ #  # ]:          0 :         if ((rd32(hw, GLGEN_RSTAT) & GLGEN_RSTAT_DEVSTATE_M) ||
    1283         [ #  # ]:          0 :             (rd32(hw, GLNVM_ULD) & ICE_RESET_DONE_MASK) ^ ICE_RESET_DONE_MASK) {
    1284                 :            :                 /* poll on global reset currently in progress until done */
    1285         [ #  # ]:          0 :                 if (ice_check_reset(hw))
    1286                 :            :                         return ICE_ERR_RESET_FAILED;
    1287                 :            : 
    1288                 :          0 :                 return ICE_SUCCESS;
    1289                 :            :         }
    1290                 :            : 
    1291                 :            :         /* Reset the PF */
    1292                 :          0 :         reg = rd32(hw, PFGEN_CTRL);
    1293                 :            : 
    1294                 :          0 :         wr32(hw, PFGEN_CTRL, (reg | PFGEN_CTRL_PFSWR_M));
    1295                 :            : 
    1296                 :            :         /* Wait for the PFR to complete. The wait time is the global config lock
    1297                 :            :          * timeout plus the PFR timeout which will account for a possible reset
    1298                 :            :          * that is occurring during a download package operation.
    1299                 :            :          */
    1300         [ #  # ]:          0 :         for (cnt = 0; cnt < ICE_GLOBAL_CFG_LOCK_TIMEOUT +
    1301                 :          0 :              ICE_PF_RESET_WAIT_COUNT; cnt++) {
    1302                 :          0 :                 reg = rd32(hw, PFGEN_CTRL);
    1303         [ #  # ]:          0 :                 if (!(reg & PFGEN_CTRL_PFSWR_M))
    1304                 :            :                         break;
    1305                 :            : 
    1306                 :          0 :                 ice_msec_delay(1, true);
    1307                 :            :         }
    1308                 :            : 
    1309         [ #  # ]:          0 :         if (cnt == ICE_PF_RESET_WAIT_COUNT) {
    1310         [ #  # ]:          0 :                 ice_debug(hw, ICE_DBG_INIT, "PF reset polling failed to complete.\n");
    1311                 :          0 :                 return ICE_ERR_RESET_FAILED;
    1312                 :            :         }
    1313                 :            : 
    1314                 :            :         return ICE_SUCCESS;
    1315                 :            : }
    1316                 :            : 
    1317                 :            : /**
    1318                 :            :  * ice_reset - Perform different types of reset
    1319                 :            :  * @hw: pointer to the hardware structure
    1320                 :            :  * @req: reset request
    1321                 :            :  *
    1322                 :            :  * This function triggers a reset as specified by the req parameter.
    1323                 :            :  *
    1324                 :            :  * Note:
    1325                 :            :  * If anything other than a PF reset is triggered, PXE mode is restored.
    1326                 :            :  * This has to be cleared using ice_clear_pxe_mode again, once the AQ
    1327                 :            :  * interface has been restored in the rebuild flow.
    1328                 :            :  */
    1329                 :          0 : enum ice_status ice_reset(struct ice_hw *hw, enum ice_reset_req req)
    1330                 :            : {
    1331                 :            :         u32 val = 0;
    1332                 :            : 
    1333   [ #  #  #  # ]:          0 :         switch (req) {
    1334                 :          0 :         case ICE_RESET_PFR:
    1335                 :          0 :                 return ice_pf_reset(hw);
    1336                 :          0 :         case ICE_RESET_CORER:
    1337         [ #  # ]:          0 :                 ice_debug(hw, ICE_DBG_INIT, "CoreR requested\n");
    1338                 :            :                 val = GLGEN_RTRIG_CORER_M;
    1339                 :            :                 break;
    1340                 :          0 :         case ICE_RESET_GLOBR:
    1341         [ #  # ]:          0 :                 ice_debug(hw, ICE_DBG_INIT, "GlobalR requested\n");
    1342                 :            :                 val = GLGEN_RTRIG_GLOBR_M;
    1343                 :            :                 break;
    1344                 :            :         default:
    1345                 :            :                 return ICE_ERR_PARAM;
    1346                 :            :         }
    1347                 :            : 
    1348                 :          0 :         val |= rd32(hw, GLGEN_RTRIG);
    1349                 :          0 :         wr32(hw, GLGEN_RTRIG, val);
    1350                 :          0 :         ice_flush(hw);
    1351                 :            : 
    1352                 :            :         /* wait for the FW to be ready */
    1353                 :          0 :         return ice_check_reset(hw);
    1354                 :            : }
    1355                 :            : 
    1356                 :            : /**
    1357                 :            :  * ice_copy_rxq_ctx_to_hw
    1358                 :            :  * @hw: pointer to the hardware structure
    1359                 :            :  * @ice_rxq_ctx: pointer to the rxq context
    1360                 :            :  * @rxq_index: the index of the Rx queue
    1361                 :            :  *
    1362                 :            :  * Copies rxq context from dense structure to HW register space
    1363                 :            :  */
    1364                 :            : static enum ice_status
    1365                 :          0 : ice_copy_rxq_ctx_to_hw(struct ice_hw *hw, u8 *ice_rxq_ctx, u32 rxq_index)
    1366                 :            : {
    1367                 :            :         u8 i;
    1368                 :            : 
    1369         [ #  # ]:          0 :         if (!ice_rxq_ctx)
    1370                 :            :                 return ICE_ERR_BAD_PTR;
    1371                 :            : 
    1372         [ #  # ]:          0 :         if (rxq_index > QRX_CTRL_MAX_INDEX)
    1373                 :            :                 return ICE_ERR_PARAM;
    1374                 :            : 
    1375                 :            :         /* Copy each dword separately to HW */
    1376         [ #  # ]:          0 :         for (i = 0; i < ICE_RXQ_CTX_SIZE_DWORDS; i++) {
    1377                 :          0 :                 wr32(hw, QRX_CONTEXT(i, rxq_index),
    1378                 :            :                      *((u32 *)(ice_rxq_ctx + (i * sizeof(u32)))));
    1379                 :            : 
    1380         [ #  # ]:          0 :                 ice_debug(hw, ICE_DBG_QCTX, "qrxdata[%d]: %08X\n", i,
    1381                 :            :                           *((u32 *)(ice_rxq_ctx + (i * sizeof(u32)))));
    1382                 :            :         }
    1383                 :            : 
    1384                 :            :         return ICE_SUCCESS;
    1385                 :            : }
    1386                 :            : 
    1387                 :            : /**
    1388                 :            :  * ice_copy_rxq_ctx_from_hw - Copy rxq context register from HW
    1389                 :            :  * @hw: pointer to the hardware structure
    1390                 :            :  * @ice_rxq_ctx: pointer to the rxq context
    1391                 :            :  * @rxq_index: the index of the Rx queue
    1392                 :            :  *
    1393                 :            :  * Copies rxq context from HW register space to dense structure
    1394                 :            :  */
    1395                 :            : static enum ice_status
    1396                 :          0 : ice_copy_rxq_ctx_from_hw(struct ice_hw *hw, u8 *ice_rxq_ctx, u32 rxq_index)
    1397                 :            : {
    1398                 :            :         u8 i;
    1399                 :            : 
    1400         [ #  # ]:          0 :         if (!ice_rxq_ctx)
    1401                 :            :                 return ICE_ERR_BAD_PTR;
    1402                 :            : 
    1403         [ #  # ]:          0 :         if (rxq_index > QRX_CTRL_MAX_INDEX)
    1404                 :            :                 return ICE_ERR_PARAM;
    1405                 :            : 
    1406                 :            :         /* Copy each dword separately from HW */
    1407         [ #  # ]:          0 :         for (i = 0; i < ICE_RXQ_CTX_SIZE_DWORDS; i++) {
    1408                 :          0 :                 u32 *ctx = (u32 *)(ice_rxq_ctx + (i * sizeof(u32)));
    1409                 :            : 
    1410                 :          0 :                 *ctx = rd32(hw, QRX_CONTEXT(i, rxq_index));
    1411                 :            : 
    1412         [ #  # ]:          0 :                 ice_debug(hw, ICE_DBG_QCTX, "qrxdata[%d]: %08X\n", i, *ctx);
    1413                 :            :         }
    1414                 :            : 
    1415                 :            :         return ICE_SUCCESS;
    1416                 :            : }
    1417                 :            : 
    1418                 :            : /* LAN Rx Queue Context */
    1419                 :            : static const struct ice_ctx_ele ice_rlan_ctx_info[] = {
    1420                 :            :         /* Field                Width   LSB */
    1421                 :            :         ICE_CTX_STORE(ice_rlan_ctx, head,               13,     0),
    1422                 :            :         ICE_CTX_STORE(ice_rlan_ctx, cpuid,              8,      13),
    1423                 :            :         ICE_CTX_STORE(ice_rlan_ctx, base,               57,     32),
    1424                 :            :         ICE_CTX_STORE(ice_rlan_ctx, qlen,               13,     89),
    1425                 :            :         ICE_CTX_STORE(ice_rlan_ctx, dbuf,               7,      102),
    1426                 :            :         ICE_CTX_STORE(ice_rlan_ctx, hbuf,               5,      109),
    1427                 :            :         ICE_CTX_STORE(ice_rlan_ctx, dtype,              2,      114),
    1428                 :            :         ICE_CTX_STORE(ice_rlan_ctx, dsize,              1,      116),
    1429                 :            :         ICE_CTX_STORE(ice_rlan_ctx, crcstrip,           1,      117),
    1430                 :            :         ICE_CTX_STORE(ice_rlan_ctx, l2tsel,             1,      119),
    1431                 :            :         ICE_CTX_STORE(ice_rlan_ctx, hsplit_0,           4,      120),
    1432                 :            :         ICE_CTX_STORE(ice_rlan_ctx, hsplit_1,           2,      124),
    1433                 :            :         ICE_CTX_STORE(ice_rlan_ctx, showiv,             1,      127),
    1434                 :            :         ICE_CTX_STORE(ice_rlan_ctx, rxmax,              14,     174),
    1435                 :            :         ICE_CTX_STORE(ice_rlan_ctx, tphrdesc_ena,       1,      193),
    1436                 :            :         ICE_CTX_STORE(ice_rlan_ctx, tphwdesc_ena,       1,      194),
    1437                 :            :         ICE_CTX_STORE(ice_rlan_ctx, tphdata_ena,        1,      195),
    1438                 :            :         ICE_CTX_STORE(ice_rlan_ctx, tphhead_ena,        1,      196),
    1439                 :            :         ICE_CTX_STORE(ice_rlan_ctx, lrxqthresh,         3,      198),
    1440                 :            :         ICE_CTX_STORE(ice_rlan_ctx, prefena,            1,      201),
    1441                 :            :         { 0 }
    1442                 :            : };
    1443                 :            : 
    1444                 :            : /**
    1445                 :            :  * ice_write_rxq_ctx
    1446                 :            :  * @hw: pointer to the hardware structure
    1447                 :            :  * @rlan_ctx: pointer to the rxq context
    1448                 :            :  * @rxq_index: the index of the Rx queue
    1449                 :            :  *
    1450                 :            :  * Converts rxq context from sparse to dense structure and then writes
    1451                 :            :  * it to HW register space and enables the hardware to prefetch descriptors
    1452                 :            :  * instead of only fetching them on demand
    1453                 :            :  */
    1454                 :            : enum ice_status
    1455                 :          0 : ice_write_rxq_ctx(struct ice_hw *hw, struct ice_rlan_ctx *rlan_ctx,
    1456                 :            :                   u32 rxq_index)
    1457                 :            : {
    1458                 :          0 :         u8 ctx_buf[ICE_RXQ_CTX_SZ] = { 0 };
    1459                 :            : 
    1460         [ #  # ]:          0 :         if (!rlan_ctx)
    1461                 :            :                 return ICE_ERR_BAD_PTR;
    1462                 :            : 
    1463                 :          0 :         rlan_ctx->prefena = 1;
    1464                 :            : 
    1465                 :          0 :         ice_set_ctx(hw, (u8 *)rlan_ctx, ctx_buf, ice_rlan_ctx_info);
    1466                 :          0 :         return ice_copy_rxq_ctx_to_hw(hw, ctx_buf, rxq_index);
    1467                 :            : }
    1468                 :            : 
    1469                 :            : /**
    1470                 :            :  * ice_read_rxq_ctx - Read rxq context from HW
    1471                 :            :  * @hw: pointer to the hardware structure
    1472                 :            :  * @rlan_ctx: pointer to the rxq context
    1473                 :            :  * @rxq_index: the index of the Rx queue
    1474                 :            :  *
    1475                 :            :  * Read rxq context from HW register space and then converts it from dense
    1476                 :            :  * structure to sparse
    1477                 :            :  */
    1478                 :            : enum ice_status
    1479                 :          0 : ice_read_rxq_ctx(struct ice_hw *hw, struct ice_rlan_ctx *rlan_ctx,
    1480                 :            :                  u32 rxq_index)
    1481                 :            : {
    1482                 :          0 :         u8 ctx_buf[ICE_RXQ_CTX_SZ] = { 0 };
    1483                 :            :         enum ice_status status;
    1484                 :            : 
    1485         [ #  # ]:          0 :         if (!rlan_ctx)
    1486                 :            :                 return ICE_ERR_BAD_PTR;
    1487                 :            : 
    1488                 :          0 :         status = ice_copy_rxq_ctx_from_hw(hw, ctx_buf, rxq_index);
    1489         [ #  # ]:          0 :         if (status)
    1490                 :            :                 return status;
    1491                 :            : 
    1492                 :          0 :         return ice_get_ctx(ctx_buf, (u8 *)rlan_ctx, ice_rlan_ctx_info);
    1493                 :            : }
    1494                 :            : 
    1495                 :            : /**
    1496                 :            :  * ice_clear_rxq_ctx
    1497                 :            :  * @hw: pointer to the hardware structure
    1498                 :            :  * @rxq_index: the index of the Rx queue to clear
    1499                 :            :  *
    1500                 :            :  * Clears rxq context in HW register space
    1501                 :            :  */
    1502                 :          0 : enum ice_status ice_clear_rxq_ctx(struct ice_hw *hw, u32 rxq_index)
    1503                 :            : {
    1504                 :            :         u8 i;
    1505                 :            : 
    1506         [ #  # ]:          0 :         if (rxq_index > QRX_CTRL_MAX_INDEX)
    1507                 :            :                 return ICE_ERR_PARAM;
    1508                 :            : 
    1509                 :            :         /* Clear each dword register separately */
    1510         [ #  # ]:          0 :         for (i = 0; i < ICE_RXQ_CTX_SIZE_DWORDS; i++)
    1511                 :          0 :                 wr32(hw, QRX_CONTEXT(i, rxq_index), 0);
    1512                 :            : 
    1513                 :            :         return ICE_SUCCESS;
    1514                 :            : }
    1515                 :            : 
    1516                 :            : /* LAN Tx Queue Context used for set Tx config by ice_aqc_opc_add_txqs,
    1517                 :            :  * Bit[0-175] is valid
    1518                 :            :  */
    1519                 :            : const struct ice_ctx_ele ice_tlan_ctx_info[] = {
    1520                 :            :                                     /* Field                    Width   LSB */
    1521                 :            :         ICE_CTX_STORE(ice_tlan_ctx, base,                       57,     0),
    1522                 :            :         ICE_CTX_STORE(ice_tlan_ctx, port_num,                   3,      57),
    1523                 :            :         ICE_CTX_STORE(ice_tlan_ctx, cgd_num,                    5,      60),
    1524                 :            :         ICE_CTX_STORE(ice_tlan_ctx, pf_num,                     3,      65),
    1525                 :            :         ICE_CTX_STORE(ice_tlan_ctx, vmvf_num,                   10,     68),
    1526                 :            :         ICE_CTX_STORE(ice_tlan_ctx, vmvf_type,                  2,      78),
    1527                 :            :         ICE_CTX_STORE(ice_tlan_ctx, src_vsi,                    10,     80),
    1528                 :            :         ICE_CTX_STORE(ice_tlan_ctx, tsyn_ena,                   1,      90),
    1529                 :            :         ICE_CTX_STORE(ice_tlan_ctx, internal_usage_flag,        1,      91),
    1530                 :            :         ICE_CTX_STORE(ice_tlan_ctx, alt_vlan,                   1,      92),
    1531                 :            :         ICE_CTX_STORE(ice_tlan_ctx, cpuid,                      8,      93),
    1532                 :            :         ICE_CTX_STORE(ice_tlan_ctx, wb_mode,                    1,      101),
    1533                 :            :         ICE_CTX_STORE(ice_tlan_ctx, tphrd_desc,                 1,      102),
    1534                 :            :         ICE_CTX_STORE(ice_tlan_ctx, tphrd,                      1,      103),
    1535                 :            :         ICE_CTX_STORE(ice_tlan_ctx, tphwr_desc,                 1,      104),
    1536                 :            :         ICE_CTX_STORE(ice_tlan_ctx, cmpq_id,                    9,      105),
    1537                 :            :         ICE_CTX_STORE(ice_tlan_ctx, qnum_in_func,               14,     114),
    1538                 :            :         ICE_CTX_STORE(ice_tlan_ctx, itr_notification_mode,      1,      128),
    1539                 :            :         ICE_CTX_STORE(ice_tlan_ctx, adjust_prof_id,             6,      129),
    1540                 :            :         ICE_CTX_STORE(ice_tlan_ctx, qlen,                       13,     135),
    1541                 :            :         ICE_CTX_STORE(ice_tlan_ctx, quanta_prof_idx,            4,      148),
    1542                 :            :         ICE_CTX_STORE(ice_tlan_ctx, tso_ena,                    1,      152),
    1543                 :            :         ICE_CTX_STORE(ice_tlan_ctx, tso_qnum,                   11,     153),
    1544                 :            :         ICE_CTX_STORE(ice_tlan_ctx, legacy_int,                 1,      164),
    1545                 :            :         ICE_CTX_STORE(ice_tlan_ctx, drop_ena,                   1,      165),
    1546                 :            :         ICE_CTX_STORE(ice_tlan_ctx, cache_prof_idx,             2,      166),
    1547                 :            :         ICE_CTX_STORE(ice_tlan_ctx, pkt_shaper_prof_idx,        3,      168),
    1548                 :            :         ICE_CTX_STORE(ice_tlan_ctx, int_q_state,                122,    171),
    1549                 :            :         ICE_CTX_STORE(ice_tlan_ctx, gsc_ena,                    1,      172),
    1550                 :            :         { 0 }
    1551                 :            : };
    1552                 :            : 
    1553                 :            : /**
    1554                 :            :  * ice_copy_tx_cmpltnq_ctx_to_hw
    1555                 :            :  * @hw: pointer to the hardware structure
    1556                 :            :  * @ice_tx_cmpltnq_ctx: pointer to the Tx completion queue context
    1557                 :            :  * @tx_cmpltnq_index: the index of the completion queue
    1558                 :            :  *
    1559                 :            :  * Copies Tx completion queue context from dense structure to HW register space
    1560                 :            :  */
    1561                 :            : static enum ice_status
    1562                 :          0 : ice_copy_tx_cmpltnq_ctx_to_hw(struct ice_hw *hw, u8 *ice_tx_cmpltnq_ctx,
    1563                 :            :                               u32 tx_cmpltnq_index)
    1564                 :            : {
    1565                 :            :         u8 i;
    1566                 :            : 
    1567         [ #  # ]:          0 :         if (!ice_tx_cmpltnq_ctx)
    1568                 :            :                 return ICE_ERR_BAD_PTR;
    1569                 :            : 
    1570         [ #  # ]:          0 :         if (tx_cmpltnq_index > GLTCLAN_CQ_CNTX0_MAX_INDEX)
    1571                 :            :                 return ICE_ERR_PARAM;
    1572                 :            : 
    1573                 :            :         /* Copy each dword separately to HW */
    1574         [ #  # ]:          0 :         for (i = 0; i < ICE_TX_CMPLTNQ_CTX_SIZE_DWORDS; i++) {
    1575                 :          0 :                 wr32(hw, GLTCLAN_CQ_CNTX(i, tx_cmpltnq_index),
    1576                 :            :                      *((u32 *)(ice_tx_cmpltnq_ctx + (i * sizeof(u32)))));
    1577                 :            : 
    1578         [ #  # ]:          0 :                 ice_debug(hw, ICE_DBG_QCTX, "cmpltnqdata[%d]: %08X\n", i,
    1579                 :            :                           *((u32 *)(ice_tx_cmpltnq_ctx + (i * sizeof(u32)))));
    1580                 :            :         }
    1581                 :            : 
    1582                 :            :         return ICE_SUCCESS;
    1583                 :            : }
    1584                 :            : 
    1585                 :            : /* LAN Tx Completion Queue Context */
    1586                 :            : static const struct ice_ctx_ele ice_tx_cmpltnq_ctx_info[] = {
    1587                 :            :                                        /* Field                 Width   LSB */
    1588                 :            :         ICE_CTX_STORE(ice_tx_cmpltnq_ctx, base,                 57,     0),
    1589                 :            :         ICE_CTX_STORE(ice_tx_cmpltnq_ctx, q_len,                18,     64),
    1590                 :            :         ICE_CTX_STORE(ice_tx_cmpltnq_ctx, generation,           1,      96),
    1591                 :            :         ICE_CTX_STORE(ice_tx_cmpltnq_ctx, wrt_ptr,              22,     97),
    1592                 :            :         ICE_CTX_STORE(ice_tx_cmpltnq_ctx, pf_num,               3,      128),
    1593                 :            :         ICE_CTX_STORE(ice_tx_cmpltnq_ctx, vmvf_num,             10,     131),
    1594                 :            :         ICE_CTX_STORE(ice_tx_cmpltnq_ctx, vmvf_type,            2,      141),
    1595                 :            :         ICE_CTX_STORE(ice_tx_cmpltnq_ctx, tph_desc_wr,          1,      160),
    1596                 :            :         ICE_CTX_STORE(ice_tx_cmpltnq_ctx, cpuid,                8,      161),
    1597                 :            :         ICE_CTX_STORE(ice_tx_cmpltnq_ctx, cmpltn_cache,         512,    192),
    1598                 :            :         { 0 }
    1599                 :            : };
    1600                 :            : 
    1601                 :            : /**
    1602                 :            :  * ice_write_tx_cmpltnq_ctx
    1603                 :            :  * @hw: pointer to the hardware structure
    1604                 :            :  * @tx_cmpltnq_ctx: pointer to the completion queue context
    1605                 :            :  * @tx_cmpltnq_index: the index of the completion queue
    1606                 :            :  *
    1607                 :            :  * Converts completion queue context from sparse to dense structure and then
    1608                 :            :  * writes it to HW register space
    1609                 :            :  */
    1610                 :            : enum ice_status
    1611                 :          0 : ice_write_tx_cmpltnq_ctx(struct ice_hw *hw,
    1612                 :            :                          struct ice_tx_cmpltnq_ctx *tx_cmpltnq_ctx,
    1613                 :            :                          u32 tx_cmpltnq_index)
    1614                 :            : {
    1615                 :          0 :         u8 ctx_buf[ICE_TX_CMPLTNQ_CTX_SIZE_DWORDS * sizeof(u32)] = { 0 };
    1616                 :            : 
    1617                 :          0 :         ice_set_ctx(hw, (u8 *)tx_cmpltnq_ctx, ctx_buf, ice_tx_cmpltnq_ctx_info);
    1618                 :          0 :         return ice_copy_tx_cmpltnq_ctx_to_hw(hw, ctx_buf, tx_cmpltnq_index);
    1619                 :            : }
    1620                 :            : 
    1621                 :            : /**
    1622                 :            :  * ice_clear_tx_cmpltnq_ctx
    1623                 :            :  * @hw: pointer to the hardware structure
    1624                 :            :  * @tx_cmpltnq_index: the index of the completion queue to clear
    1625                 :            :  *
    1626                 :            :  * Clears Tx completion queue context in HW register space
    1627                 :            :  */
    1628                 :            : enum ice_status
    1629                 :          0 : ice_clear_tx_cmpltnq_ctx(struct ice_hw *hw, u32 tx_cmpltnq_index)
    1630                 :            : {
    1631                 :            :         u8 i;
    1632                 :            : 
    1633         [ #  # ]:          0 :         if (tx_cmpltnq_index > GLTCLAN_CQ_CNTX0_MAX_INDEX)
    1634                 :            :                 return ICE_ERR_PARAM;
    1635                 :            : 
    1636                 :            :         /* Clear each dword register separately */
    1637         [ #  # ]:          0 :         for (i = 0; i < ICE_TX_CMPLTNQ_CTX_SIZE_DWORDS; i++)
    1638                 :          0 :                 wr32(hw, GLTCLAN_CQ_CNTX(i, tx_cmpltnq_index), 0);
    1639                 :            : 
    1640                 :            :         return ICE_SUCCESS;
    1641                 :            : }
    1642                 :            : 
    1643                 :            : /**
    1644                 :            :  * ice_copy_tx_drbell_q_ctx_to_hw
    1645                 :            :  * @hw: pointer to the hardware structure
    1646                 :            :  * @ice_tx_drbell_q_ctx: pointer to the doorbell queue context
    1647                 :            :  * @tx_drbell_q_index: the index of the doorbell queue
    1648                 :            :  *
    1649                 :            :  * Copies doorbell queue context from dense structure to HW register space
    1650                 :            :  */
    1651                 :            : static enum ice_status
    1652                 :          0 : ice_copy_tx_drbell_q_ctx_to_hw(struct ice_hw *hw, u8 *ice_tx_drbell_q_ctx,
    1653                 :            :                                u32 tx_drbell_q_index)
    1654                 :            : {
    1655                 :            :         u8 i;
    1656                 :            : 
    1657         [ #  # ]:          0 :         if (!ice_tx_drbell_q_ctx)
    1658                 :            :                 return ICE_ERR_BAD_PTR;
    1659                 :            : 
    1660         [ #  # ]:          0 :         if (tx_drbell_q_index > QTX_COMM_DBLQ_DBELL_MAX_INDEX)
    1661                 :            :                 return ICE_ERR_PARAM;
    1662                 :            : 
    1663                 :            :         /* Copy each dword separately to HW */
    1664         [ #  # ]:          0 :         for (i = 0; i < ICE_TX_DRBELL_Q_CTX_SIZE_DWORDS; i++) {
    1665                 :          0 :                 wr32(hw, QTX_COMM_DBLQ_CNTX(i, tx_drbell_q_index),
    1666                 :            :                      *((u32 *)(ice_tx_drbell_q_ctx + (i * sizeof(u32)))));
    1667                 :            : 
    1668         [ #  # ]:          0 :                 ice_debug(hw, ICE_DBG_QCTX, "tx_drbell_qdata[%d]: %08X\n", i,
    1669                 :            :                           *((u32 *)(ice_tx_drbell_q_ctx + (i * sizeof(u32)))));
    1670                 :            :         }
    1671                 :            : 
    1672                 :            :         return ICE_SUCCESS;
    1673                 :            : }
    1674                 :            : 
    1675                 :            : /* LAN Tx Doorbell Queue Context info */
    1676                 :            : static const struct ice_ctx_ele ice_tx_drbell_q_ctx_info[] = {
    1677                 :            :                                         /* Field                Width   LSB */
    1678                 :            :         ICE_CTX_STORE(ice_tx_drbell_q_ctx, base,                57,     0),
    1679                 :            :         ICE_CTX_STORE(ice_tx_drbell_q_ctx, ring_len,            13,     64),
    1680                 :            :         ICE_CTX_STORE(ice_tx_drbell_q_ctx, pf_num,              3,      80),
    1681                 :            :         ICE_CTX_STORE(ice_tx_drbell_q_ctx, vf_num,              8,      84),
    1682                 :            :         ICE_CTX_STORE(ice_tx_drbell_q_ctx, vmvf_type,           2,      94),
    1683                 :            :         ICE_CTX_STORE(ice_tx_drbell_q_ctx, cpuid,               8,      96),
    1684                 :            :         ICE_CTX_STORE(ice_tx_drbell_q_ctx, tph_desc_rd,         1,      104),
    1685                 :            :         ICE_CTX_STORE(ice_tx_drbell_q_ctx, tph_desc_wr,         1,      108),
    1686                 :            :         ICE_CTX_STORE(ice_tx_drbell_q_ctx, db_q_en,             1,      112),
    1687                 :            :         ICE_CTX_STORE(ice_tx_drbell_q_ctx, rd_head,             13,     128),
    1688                 :            :         ICE_CTX_STORE(ice_tx_drbell_q_ctx, rd_tail,             13,     144),
    1689                 :            :         { 0 }
    1690                 :            : };
    1691                 :            : 
    1692                 :            : /**
    1693                 :            :  * ice_write_tx_drbell_q_ctx
    1694                 :            :  * @hw: pointer to the hardware structure
    1695                 :            :  * @tx_drbell_q_ctx: pointer to the doorbell queue context
    1696                 :            :  * @tx_drbell_q_index: the index of the doorbell queue
    1697                 :            :  *
    1698                 :            :  * Converts doorbell queue context from sparse to dense structure and then
    1699                 :            :  * writes it to HW register space
    1700                 :            :  */
    1701                 :            : enum ice_status
    1702                 :          0 : ice_write_tx_drbell_q_ctx(struct ice_hw *hw,
    1703                 :            :                           struct ice_tx_drbell_q_ctx *tx_drbell_q_ctx,
    1704                 :            :                           u32 tx_drbell_q_index)
    1705                 :            : {
    1706                 :          0 :         u8 ctx_buf[ICE_TX_DRBELL_Q_CTX_SIZE_DWORDS * sizeof(u32)] = { 0 };
    1707                 :            : 
    1708                 :          0 :         ice_set_ctx(hw, (u8 *)tx_drbell_q_ctx, ctx_buf,
    1709                 :            :                     ice_tx_drbell_q_ctx_info);
    1710                 :          0 :         return ice_copy_tx_drbell_q_ctx_to_hw(hw, ctx_buf, tx_drbell_q_index);
    1711                 :            : }
    1712                 :            : 
    1713                 :            : /**
    1714                 :            :  * ice_clear_tx_drbell_q_ctx
    1715                 :            :  * @hw: pointer to the hardware structure
    1716                 :            :  * @tx_drbell_q_index: the index of the doorbell queue to clear
    1717                 :            :  *
    1718                 :            :  * Clears doorbell queue context in HW register space
    1719                 :            :  */
    1720                 :            : enum ice_status
    1721                 :          0 : ice_clear_tx_drbell_q_ctx(struct ice_hw *hw, u32 tx_drbell_q_index)
    1722                 :            : {
    1723                 :            :         u8 i;
    1724                 :            : 
    1725         [ #  # ]:          0 :         if (tx_drbell_q_index > QTX_COMM_DBLQ_DBELL_MAX_INDEX)
    1726                 :            :                 return ICE_ERR_PARAM;
    1727                 :            : 
    1728                 :            :         /* Clear each dword register separately */
    1729         [ #  # ]:          0 :         for (i = 0; i < ICE_TX_DRBELL_Q_CTX_SIZE_DWORDS; i++)
    1730                 :          0 :                 wr32(hw, QTX_COMM_DBLQ_CNTX(i, tx_drbell_q_index), 0);
    1731                 :            : 
    1732                 :            :         return ICE_SUCCESS;
    1733                 :            : }
    1734                 :            : 
    1735                 :            : /* Sideband Queue command wrappers */
    1736                 :            : 
    1737                 :            : /**
    1738                 :            :  * ice_get_sbq - returns the right control queue to use for sideband
    1739                 :            :  * @hw: pointer to the hardware structure
    1740                 :            :  */
    1741                 :            : static struct ice_ctl_q_info *ice_get_sbq(struct ice_hw *hw)
    1742                 :            : {
    1743   [ #  #  #  #  :          0 :         if (!ice_is_generic_mac(hw))
             #  #  #  # ]
    1744                 :          0 :                 return &hw->adminq;
    1745                 :          0 :         return &hw->sbq;
    1746                 :            : }
    1747                 :            : 
    1748                 :            : /**
    1749                 :            :  * ice_sbq_send_cmd - send Sideband Queue command to Sideband Queue
    1750                 :            :  * @hw: pointer to the HW struct
    1751                 :            :  * @desc: descriptor describing the command
    1752                 :            :  * @buf: buffer to use for indirect commands (NULL for direct commands)
    1753                 :            :  * @buf_size: size of buffer for indirect commands (0 for direct commands)
    1754                 :            :  * @cd: pointer to command details structure
    1755                 :            :  */
    1756                 :            : static enum ice_status
    1757                 :          0 : ice_sbq_send_cmd(struct ice_hw *hw, struct ice_sbq_cmd_desc *desc,
    1758                 :            :                  void *buf, u16 buf_size, struct ice_sq_cd *cd)
    1759                 :            : {
    1760                 :          0 :         return ice_sq_send_cmd(hw, ice_get_sbq(hw), (struct ice_aq_desc *)desc,
    1761                 :            :                                buf, buf_size, cd);
    1762                 :            : }
    1763                 :            : 
    1764                 :            : /**
    1765                 :            :  * ice_sbq_send_cmd_nolock - send Sideband Queue command to Sideband Queue
    1766                 :            :  *                           but do not lock sq_lock
    1767                 :            :  * @hw: pointer to the HW struct
    1768                 :            :  * @desc: descriptor describing the command
    1769                 :            :  * @buf: buffer to use for indirect commands (NULL for direct commands)
    1770                 :            :  * @buf_size: size of buffer for indirect commands (0 for direct commands)
    1771                 :            :  * @cd: pointer to command details structure
    1772                 :            :  */
    1773                 :            : static enum ice_status
    1774                 :          0 : ice_sbq_send_cmd_nolock(struct ice_hw *hw, struct ice_sbq_cmd_desc *desc,
    1775                 :            :                         void *buf, u16 buf_size, struct ice_sq_cd *cd)
    1776                 :            : {
    1777                 :          0 :         return ice_sq_send_cmd_nolock(hw, ice_get_sbq(hw),
    1778                 :            :                                       (struct ice_aq_desc *)desc, buf,
    1779                 :            :                                       buf_size, cd);
    1780                 :            : }
    1781                 :            : 
    1782                 :            : /**
    1783                 :            :  * ice_sbq_rw_reg_lp - Fill Sideband Queue command, with lock parameter
    1784                 :            :  * @hw: pointer to the HW struct
    1785                 :            :  * @in: message info to be filled in descriptor
    1786                 :            :  * @lock: true to lock the sq_lock (the usual case); false if the sq_lock has
    1787                 :            :  *        already been locked at a higher level
    1788                 :            :  */
    1789                 :          0 : enum ice_status ice_sbq_rw_reg_lp(struct ice_hw *hw,
    1790                 :            :                                   struct ice_sbq_msg_input *in, bool lock)
    1791                 :            : {
    1792                 :          0 :         struct ice_sbq_cmd_desc desc = {0};
    1793                 :          0 :         struct ice_sbq_msg_req msg = {0};
    1794                 :            :         enum ice_status status;
    1795                 :            :         u16 msg_len;
    1796                 :            : 
    1797                 :            :         msg_len = sizeof(msg);
    1798                 :            : 
    1799                 :          0 :         msg.dest_dev = in->dest_dev;
    1800                 :          0 :         msg.opcode = in->opcode;
    1801                 :          0 :         msg.flags = ICE_SBQ_MSG_FLAGS;
    1802                 :          0 :         msg.sbe_fbe = ICE_SBQ_MSG_SBE_FBE;
    1803                 :          0 :         msg.msg_addr_low = CPU_TO_LE16(in->msg_addr_low);
    1804                 :          0 :         msg.msg_addr_high = CPU_TO_LE32(in->msg_addr_high);
    1805                 :            : 
    1806         [ #  # ]:          0 :         if (in->opcode)
    1807                 :          0 :                 msg.data = CPU_TO_LE32(in->data);
    1808                 :            :         else
    1809                 :            :                 /* data read comes back in completion, so shorten the struct by
    1810                 :            :                  * sizeof(msg.data)
    1811                 :            :                  */
    1812                 :            :                 msg_len -= sizeof(msg.data);
    1813                 :            : 
    1814                 :          0 :         desc.flags = CPU_TO_LE16(ICE_AQ_FLAG_RD);
    1815                 :          0 :         desc.opcode = CPU_TO_LE16(ice_sbq_opc_neigh_dev_req);
    1816                 :          0 :         desc.param0.cmd_len = CPU_TO_LE16(msg_len);
    1817         [ #  # ]:          0 :         if (lock)
    1818                 :          0 :                 status = ice_sbq_send_cmd(hw, &desc, &msg, msg_len, NULL);
    1819                 :            :         else
    1820                 :          0 :                 status = ice_sbq_send_cmd_nolock(hw, &desc, &msg, msg_len,
    1821                 :            :                                                  NULL);
    1822   [ #  #  #  # ]:          0 :         if (!status && !in->opcode)
    1823                 :          0 :                 in->data = LE32_TO_CPU
    1824                 :            :                         (((struct ice_sbq_msg_cmpl *)&msg)->data);
    1825                 :          0 :         return status;
    1826                 :            : }
    1827                 :            : 
    1828                 :            : /**
    1829                 :            :  * ice_sbq_rw_reg - Fill Sideband Queue command
    1830                 :            :  * @hw: pointer to the HW struct
    1831                 :            :  * @in: message info to be filled in descriptor
    1832                 :            :  */
    1833                 :          0 : enum ice_status ice_sbq_rw_reg(struct ice_hw *hw, struct ice_sbq_msg_input *in)
    1834                 :            : {
    1835                 :          0 :         return ice_sbq_rw_reg_lp(hw, in, true);
    1836                 :            : }
    1837                 :            : 
    1838                 :            : /**
    1839                 :            :  * ice_sbq_lock - Lock the sideband queue's sq_lock
    1840                 :            :  * @hw: pointer to the HW struct
    1841                 :            :  */
    1842                 :          0 : void ice_sbq_lock(struct ice_hw *hw)
    1843                 :            : {
    1844                 :          0 :         ice_acquire_lock(&ice_get_sbq(hw)->sq_lock);
    1845                 :          0 : }
    1846                 :            : 
    1847                 :            : /**
    1848                 :            :  * ice_sbq_unlock - Unlock the sideband queue's sq_lock
    1849                 :            :  * @hw: pointer to the HW struct
    1850                 :            :  */
    1851                 :          0 : void ice_sbq_unlock(struct ice_hw *hw)
    1852                 :            : {
    1853                 :          0 :         ice_release_lock(&ice_get_sbq(hw)->sq_lock);
    1854                 :          0 : }
    1855                 :            : 
    1856                 :            : /* FW Admin Queue command wrappers */
    1857                 :            : 
    1858                 :            : /**
    1859                 :            :  * ice_should_retry_sq_send_cmd
    1860                 :            :  * @opcode: AQ opcode
    1861                 :            :  *
    1862                 :            :  * Decide if we should retry the send command routine for the ATQ, depending
    1863                 :            :  * on the opcode.
    1864                 :            :  */
    1865                 :            : static bool ice_should_retry_sq_send_cmd(u16 opcode)
    1866                 :            : {
    1867                 :          0 :         switch (opcode) {
    1868                 :            :         case ice_aqc_opc_get_link_topo:
    1869                 :            :         case ice_aqc_opc_lldp_stop:
    1870                 :            :         case ice_aqc_opc_lldp_start:
    1871                 :            :         case ice_aqc_opc_lldp_filter_ctrl:
    1872                 :            :                 return true;
    1873                 :            :         }
    1874                 :            : 
    1875                 :          0 :         return false;
    1876                 :            : }
    1877                 :            : 
    1878                 :            : /**
    1879                 :            :  * ice_sq_send_cmd_retry - send command to Control Queue (ATQ)
    1880                 :            :  * @hw: pointer to the HW struct
    1881                 :            :  * @cq: pointer to the specific Control queue
    1882                 :            :  * @desc: prefilled descriptor describing the command
    1883                 :            :  * @buf: buffer to use for indirect commands (or NULL for direct commands)
    1884                 :            :  * @buf_size: size of buffer for indirect commands (or 0 for direct commands)
    1885                 :            :  * @cd: pointer to command details structure
    1886                 :            :  *
    1887                 :            :  * Retry sending the FW Admin Queue command, multiple times, to the FW Admin
    1888                 :            :  * Queue if the EBUSY AQ error is returned.
    1889                 :            :  */
    1890                 :            : static enum ice_status
    1891                 :          0 : ice_sq_send_cmd_retry(struct ice_hw *hw, struct ice_ctl_q_info *cq,
    1892                 :            :                       struct ice_aq_desc *desc, void *buf, u16 buf_size,
    1893                 :            :                       struct ice_sq_cd *cd)
    1894                 :            : {
    1895                 :            :         struct ice_aq_desc desc_cpy;
    1896                 :            :         enum ice_status status;
    1897                 :            :         bool is_cmd_for_retry;
    1898                 :            :         u8 *buf_cpy = NULL;
    1899                 :            :         u8 idx = 0;
    1900                 :            :         u16 opcode;
    1901                 :            : 
    1902         [ #  # ]:          0 :         opcode = LE16_TO_CPU(desc->opcode);
    1903                 :            :         is_cmd_for_retry = ice_should_retry_sq_send_cmd(opcode);
    1904                 :            :         ice_memset(&desc_cpy, 0, sizeof(desc_cpy), ICE_NONDMA_MEM);
    1905                 :            : 
    1906         [ #  # ]:          0 :         if (is_cmd_for_retry) {
    1907         [ #  # ]:          0 :                 if (buf) {
    1908                 :          0 :                         buf_cpy = (u8 *)ice_malloc(hw, buf_size);
    1909         [ #  # ]:          0 :                         if (!buf_cpy)
    1910                 :            :                                 return ICE_ERR_NO_MEMORY;
    1911                 :            :                 }
    1912                 :            : 
    1913                 :            :                 ice_memcpy(&desc_cpy, desc, sizeof(desc_cpy),
    1914                 :            :                            ICE_NONDMA_TO_NONDMA);
    1915                 :            :         }
    1916                 :            : 
    1917                 :            :         do {
    1918                 :          0 :                 status = ice_sq_send_cmd(hw, cq, desc, buf, buf_size, cd);
    1919                 :            : 
    1920         [ #  # ]:          0 :                 if (!is_cmd_for_retry || status == ICE_SUCCESS ||
    1921         [ #  # ]:          0 :                     hw->adminq.sq_last_status != ICE_AQ_RC_EBUSY)
    1922                 :            :                         break;
    1923                 :            : 
    1924         [ #  # ]:          0 :                 if (buf_cpy)
    1925         [ #  # ]:          0 :                         ice_memcpy(buf, buf_cpy, buf_size,
    1926                 :            :                                    ICE_NONDMA_TO_NONDMA);
    1927                 :            : 
    1928                 :            :                 ice_memcpy(desc, &desc_cpy, sizeof(desc_cpy),
    1929                 :            :                            ICE_NONDMA_TO_NONDMA);
    1930                 :            : 
    1931                 :          0 :                 ice_msec_delay(ICE_SQ_SEND_DELAY_TIME_MS, false);
    1932                 :            : 
    1933         [ #  # ]:          0 :         } while (++idx < ICE_SQ_SEND_MAX_EXECUTE);
    1934                 :            : 
    1935         [ #  # ]:          0 :         if (buf_cpy)
    1936                 :          0 :                 ice_free(hw, buf_cpy);
    1937                 :            : 
    1938                 :            :         return status;
    1939                 :            : }
    1940                 :            : 
    1941                 :            : /**
    1942                 :            :  * ice_aq_send_cmd - send FW Admin Queue command to FW Admin Queue
    1943                 :            :  * @hw: pointer to the HW struct
    1944                 :            :  * @desc: descriptor describing the command
    1945                 :            :  * @buf: buffer to use for indirect commands (NULL for direct commands)
    1946                 :            :  * @buf_size: size of buffer for indirect commands (0 for direct commands)
    1947                 :            :  * @cd: pointer to command details structure
    1948                 :            :  *
    1949                 :            :  * Helper function to send FW Admin Queue commands to the FW Admin Queue.
    1950                 :            :  */
    1951                 :            : enum ice_status
    1952                 :          0 : ice_aq_send_cmd(struct ice_hw *hw, struct ice_aq_desc *desc, void *buf,
    1953                 :            :                 u16 buf_size, struct ice_sq_cd *cd)
    1954                 :            : {
    1955         [ #  # ]:          0 :         if (hw->aq_send_cmd_fn) {
    1956                 :            :                 enum ice_status status = ICE_ERR_NOT_READY;
    1957                 :            :                 u16 retval = ICE_AQ_RC_OK;
    1958                 :            : 
    1959                 :          0 :                 ice_acquire_lock(&hw->adminq.sq_lock);
    1960         [ #  # ]:          0 :                 if (!hw->aq_send_cmd_fn(hw->aq_send_cmd_param, desc,
    1961                 :            :                                         buf, buf_size)) {
    1962                 :          0 :                         retval = LE16_TO_CPU(desc->retval);
    1963                 :            :                         /* strip off FW internal code */
    1964         [ #  # ]:          0 :                         if (retval)
    1965                 :          0 :                                 retval &= 0xff;
    1966         [ #  # ]:          0 :                         if (retval == ICE_AQ_RC_OK)
    1967                 :            :                                 status = ICE_SUCCESS;
    1968                 :            :                         else
    1969                 :            :                                 status = ICE_ERR_AQ_ERROR;
    1970                 :            :                 }
    1971                 :            : 
    1972                 :          0 :                 hw->adminq.sq_last_status = (enum ice_aq_err)retval;
    1973                 :            :                 ice_release_lock(&hw->adminq.sq_lock);
    1974                 :            : 
    1975                 :          0 :                 return status;
    1976                 :            :         }
    1977                 :          0 :         return ice_sq_send_cmd_retry(hw, &hw->adminq, desc, buf, buf_size, cd);
    1978                 :            : }
    1979                 :            : 
    1980                 :            : /**
    1981                 :            :  * ice_aq_get_fw_ver
    1982                 :            :  * @hw: pointer to the HW struct
    1983                 :            :  * @cd: pointer to command details structure or NULL
    1984                 :            :  *
    1985                 :            :  * Get the firmware version (0x0001) from the admin queue commands
    1986                 :            :  */
    1987                 :          0 : enum ice_status ice_aq_get_fw_ver(struct ice_hw *hw, struct ice_sq_cd *cd)
    1988                 :            : {
    1989                 :            :         struct ice_aqc_get_ver *resp;
    1990                 :            :         struct ice_aq_desc desc;
    1991                 :            :         enum ice_status status;
    1992                 :            : 
    1993                 :            :         resp = &desc.params.get_ver;
    1994                 :            : 
    1995                 :          0 :         ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_get_ver);
    1996                 :            : 
    1997                 :          0 :         status = ice_aq_send_cmd(hw, &desc, NULL, 0, cd);
    1998                 :            : 
    1999         [ #  # ]:          0 :         if (!status) {
    2000                 :          0 :                 hw->fw_branch = resp->fw_branch;
    2001                 :          0 :                 hw->fw_maj_ver = resp->fw_major;
    2002                 :          0 :                 hw->fw_min_ver = resp->fw_minor;
    2003                 :          0 :                 hw->fw_patch = resp->fw_patch;
    2004                 :          0 :                 hw->fw_build = LE32_TO_CPU(resp->fw_build);
    2005                 :          0 :                 hw->api_branch = resp->api_branch;
    2006                 :          0 :                 hw->api_maj_ver = resp->api_major;
    2007                 :          0 :                 hw->api_min_ver = resp->api_minor;
    2008                 :          0 :                 hw->api_patch = resp->api_patch;
    2009                 :            :         }
    2010                 :            : 
    2011                 :          0 :         return status;
    2012                 :            : }
    2013                 :            : 
    2014                 :            : /**
    2015                 :            :  * ice_aq_send_driver_ver
    2016                 :            :  * @hw: pointer to the HW struct
    2017                 :            :  * @dv: driver's major, minor version
    2018                 :            :  * @cd: pointer to command details structure or NULL
    2019                 :            :  *
    2020                 :            :  * Send the driver version (0x0002) to the firmware
    2021                 :            :  */
    2022                 :            : enum ice_status
    2023                 :          0 : ice_aq_send_driver_ver(struct ice_hw *hw, struct ice_driver_ver *dv,
    2024                 :            :                        struct ice_sq_cd *cd)
    2025                 :            : {
    2026                 :            :         struct ice_aqc_driver_ver *cmd;
    2027                 :            :         struct ice_aq_desc desc;
    2028                 :            :         u16 len;
    2029                 :            : 
    2030                 :            :         cmd = &desc.params.driver_ver;
    2031                 :            : 
    2032         [ #  # ]:          0 :         if (!dv)
    2033                 :            :                 return ICE_ERR_PARAM;
    2034                 :            : 
    2035                 :          0 :         ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_driver_ver);
    2036                 :            : 
    2037                 :          0 :         desc.flags |= CPU_TO_LE16(ICE_AQ_FLAG_RD);
    2038                 :          0 :         cmd->major_ver = dv->major_ver;
    2039                 :          0 :         cmd->minor_ver = dv->minor_ver;
    2040                 :          0 :         cmd->build_ver = dv->build_ver;
    2041                 :          0 :         cmd->subbuild_ver = dv->subbuild_ver;
    2042                 :            : 
    2043                 :            :         len = 0;
    2044                 :          0 :         while (len < sizeof(dv->driver_string) &&
    2045   [ #  #  #  #  :          0 :                IS_ASCII(dv->driver_string[len]) && dv->driver_string[len])
                   #  # ]
    2046                 :          0 :                 len++;
    2047                 :            : 
    2048                 :          0 :         return ice_aq_send_cmd(hw, &desc, dv->driver_string, len, cd);
    2049                 :            : }
    2050                 :            : 
    2051                 :            : /**
    2052                 :            :  * ice_aq_q_shutdown
    2053                 :            :  * @hw: pointer to the HW struct
    2054                 :            :  * @unloading: is the driver unloading itself
    2055                 :            :  *
    2056                 :            :  * Tell the Firmware that we're shutting down the AdminQ and whether
    2057                 :            :  * or not the driver is unloading as well (0x0003).
    2058                 :            :  */
    2059                 :          0 : enum ice_status ice_aq_q_shutdown(struct ice_hw *hw, bool unloading)
    2060                 :            : {
    2061                 :            :         struct ice_aqc_q_shutdown *cmd;
    2062                 :            :         struct ice_aq_desc desc;
    2063                 :            : 
    2064                 :            :         cmd = &desc.params.q_shutdown;
    2065                 :            : 
    2066                 :          0 :         ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_q_shutdown);
    2067                 :            : 
    2068         [ #  # ]:          0 :         if (unloading)
    2069                 :          0 :                 cmd->driver_unloading = ICE_AQC_DRIVER_UNLOADING;
    2070                 :            : 
    2071                 :          0 :         return ice_aq_send_cmd(hw, &desc, NULL, 0, NULL);
    2072                 :            : }
    2073                 :            : 
    2074                 :            : /**
    2075                 :            :  * ice_aq_req_res
    2076                 :            :  * @hw: pointer to the HW struct
    2077                 :            :  * @res: resource ID
    2078                 :            :  * @access: access type
    2079                 :            :  * @sdp_number: resource number
    2080                 :            :  * @timeout: the maximum time in ms that the driver may hold the resource
    2081                 :            :  * @cd: pointer to command details structure or NULL
    2082                 :            :  *
    2083                 :            :  * Requests common resource using the admin queue commands (0x0008).
    2084                 :            :  * When attempting to acquire the Global Config Lock, the driver can
    2085                 :            :  * learn of three states:
    2086                 :            :  *  1) ICE_SUCCESS -        acquired lock, and can perform download package
    2087                 :            :  *  2) ICE_ERR_AQ_ERROR -   did not get lock, driver should fail to load
    2088                 :            :  *  3) ICE_ERR_AQ_NO_WORK - did not get lock, but another driver has
    2089                 :            :  *                          successfully downloaded the package; the driver does
    2090                 :            :  *                          not have to download the package and can continue
    2091                 :            :  *                          loading
    2092                 :            :  *
    2093                 :            :  * Note that if the caller is in an acquire lock, perform action, release lock
    2094                 :            :  * phase of operation, it is possible that the FW may detect a timeout and issue
    2095                 :            :  * a CORER. In this case, the driver will receive a CORER interrupt and will
    2096                 :            :  * have to determine its cause. The calling thread that is handling this flow
    2097                 :            :  * will likely get an error propagated back to it indicating the Download
    2098                 :            :  * Package, Update Package or the Release Resource AQ commands timed out.
    2099                 :            :  */
    2100                 :            : static enum ice_status
    2101                 :          0 : ice_aq_req_res(struct ice_hw *hw, enum ice_aq_res_ids res,
    2102                 :            :                enum ice_aq_res_access_type access, u8 sdp_number, u32 *timeout,
    2103                 :            :                struct ice_sq_cd *cd)
    2104                 :            : {
    2105                 :            :         struct ice_aqc_req_res *cmd_resp;
    2106                 :            :         struct ice_aq_desc desc;
    2107                 :            :         enum ice_status status;
    2108                 :            : 
    2109         [ #  # ]:          0 :         ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);
    2110                 :            : 
    2111                 :            :         cmd_resp = &desc.params.res_owner;
    2112                 :            : 
    2113                 :          0 :         ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_req_res);
    2114                 :            : 
    2115                 :          0 :         cmd_resp->res_id = CPU_TO_LE16(res);
    2116                 :          0 :         cmd_resp->access_type = CPU_TO_LE16(access);
    2117                 :          0 :         cmd_resp->res_number = CPU_TO_LE32(sdp_number);
    2118                 :          0 :         cmd_resp->timeout = CPU_TO_LE32(*timeout);
    2119                 :          0 :         *timeout = 0;
    2120                 :            : 
    2121                 :          0 :         status = ice_aq_send_cmd(hw, &desc, NULL, 0, cd);
    2122                 :            : 
    2123                 :            :         /* The completion specifies the maximum time in ms that the driver
    2124                 :            :          * may hold the resource in the Timeout field.
    2125                 :            :          */
    2126                 :            : 
    2127                 :            :         /* Global config lock response utilizes an additional status field.
    2128                 :            :          *
    2129                 :            :          * If the Global config lock resource is held by some other driver, the
    2130                 :            :          * command completes with ICE_AQ_RES_GLBL_IN_PROG in the status field
    2131                 :            :          * and the timeout field indicates the maximum time the current owner
    2132                 :            :          * of the resource has to free it.
    2133                 :            :          */
    2134         [ #  # ]:          0 :         if (res == ICE_GLOBAL_CFG_LOCK_RES_ID) {
    2135         [ #  # ]:          0 :                 if (LE16_TO_CPU(cmd_resp->status) == ICE_AQ_RES_GLBL_SUCCESS) {
    2136                 :          0 :                         *timeout = LE32_TO_CPU(cmd_resp->timeout);
    2137                 :          0 :                         return ICE_SUCCESS;
    2138         [ #  # ]:          0 :                 } else if (LE16_TO_CPU(cmd_resp->status) ==
    2139                 :            :                            ICE_AQ_RES_GLBL_IN_PROG) {
    2140                 :          0 :                         *timeout = LE32_TO_CPU(cmd_resp->timeout);
    2141                 :          0 :                         return ICE_ERR_AQ_ERROR;
    2142         [ #  # ]:          0 :                 } else if (LE16_TO_CPU(cmd_resp->status) ==
    2143                 :            :                            ICE_AQ_RES_GLBL_DONE) {
    2144                 :            :                         return ICE_ERR_AQ_NO_WORK;
    2145                 :            :                 }
    2146                 :            : 
    2147                 :            :                 /* invalid FW response, force a timeout immediately */
    2148                 :          0 :                 *timeout = 0;
    2149                 :          0 :                 return ICE_ERR_AQ_ERROR;
    2150                 :            :         }
    2151                 :            : 
    2152                 :            :         /* If the resource is held by some other driver, the command completes
    2153                 :            :          * with a busy return value and the timeout field indicates the maximum
    2154                 :            :          * time the current owner of the resource has to free it.
    2155                 :            :          */
    2156   [ #  #  #  # ]:          0 :         if (!status || hw->adminq.sq_last_status == ICE_AQ_RC_EBUSY)
    2157                 :          0 :                 *timeout = LE32_TO_CPU(cmd_resp->timeout);
    2158                 :            : 
    2159                 :            :         return status;
    2160                 :            : }
    2161                 :            : 
    2162                 :            : /**
    2163                 :            :  * ice_aq_release_res
    2164                 :            :  * @hw: pointer to the HW struct
    2165                 :            :  * @res: resource ID
    2166                 :            :  * @sdp_number: resource number
    2167                 :            :  * @cd: pointer to command details structure or NULL
    2168                 :            :  *
    2169                 :            :  * release common resource using the admin queue commands (0x0009)
    2170                 :            :  */
    2171                 :            : static enum ice_status
    2172                 :          0 : ice_aq_release_res(struct ice_hw *hw, enum ice_aq_res_ids res, u8 sdp_number,
    2173                 :            :                    struct ice_sq_cd *cd)
    2174                 :            : {
    2175                 :            :         struct ice_aqc_req_res *cmd;
    2176                 :            :         struct ice_aq_desc desc;
    2177                 :            : 
    2178         [ #  # ]:          0 :         ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);
    2179                 :            : 
    2180                 :            :         cmd = &desc.params.res_owner;
    2181                 :            : 
    2182                 :          0 :         ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_release_res);
    2183                 :            : 
    2184                 :          0 :         cmd->res_id = CPU_TO_LE16(res);
    2185                 :          0 :         cmd->res_number = CPU_TO_LE32(sdp_number);
    2186                 :            : 
    2187                 :          0 :         return ice_aq_send_cmd(hw, &desc, NULL, 0, cd);
    2188                 :            : }
    2189                 :            : 
    2190                 :            : /**
    2191                 :            :  * ice_acquire_res
    2192                 :            :  * @hw: pointer to the HW structure
    2193                 :            :  * @res: resource ID
    2194                 :            :  * @access: access type (read or write)
    2195                 :            :  * @timeout: timeout in milliseconds
    2196                 :            :  *
    2197                 :            :  * This function will attempt to acquire the ownership of a resource.
    2198                 :            :  */
    2199                 :            : enum ice_status
    2200                 :          0 : ice_acquire_res(struct ice_hw *hw, enum ice_aq_res_ids res,
    2201                 :            :                 enum ice_aq_res_access_type access, u32 timeout)
    2202                 :            : {
    2203                 :            : #define ICE_RES_POLLING_DELAY_MS        10
    2204                 :            :         u32 delay = ICE_RES_POLLING_DELAY_MS;
    2205                 :          0 :         u32 time_left = timeout;
    2206                 :            :         enum ice_status status;
    2207                 :            : 
    2208         [ #  # ]:          0 :         ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);
    2209                 :            : 
    2210                 :          0 :         status = ice_aq_req_res(hw, res, access, 0, &time_left, NULL);
    2211                 :            : 
    2212                 :            :         /* A return code of ICE_ERR_AQ_NO_WORK means that another driver has
    2213                 :            :          * previously acquired the resource and performed any necessary updates;
    2214                 :            :          * in this case the caller does not obtain the resource and has no
    2215                 :            :          * further work to do.
    2216                 :            :          */
    2217         [ #  # ]:          0 :         if (status == ICE_ERR_AQ_NO_WORK)
    2218                 :          0 :                 goto ice_acquire_res_exit;
    2219                 :            : 
    2220         [ #  # ]:          0 :         if (status)
    2221         [ #  # ]:          0 :                 ice_debug(hw, ICE_DBG_RES, "resource %d acquire type %d failed.\n", res, access);
    2222                 :            : 
    2223                 :            :         /* If necessary, poll until the current lock owner timeouts */
    2224                 :          0 :         timeout = time_left;
    2225   [ #  #  #  # ]:          0 :         while (status && timeout && time_left) {
    2226                 :          0 :                 ice_msec_delay(delay, true);
    2227         [ #  # ]:          0 :                 timeout = (timeout > delay) ? timeout - delay : 0;
    2228                 :          0 :                 status = ice_aq_req_res(hw, res, access, 0, &time_left, NULL);
    2229                 :            : 
    2230         [ #  # ]:          0 :                 if (status == ICE_ERR_AQ_NO_WORK)
    2231                 :            :                         /* lock free, but no work to do */
    2232                 :            :                         break;
    2233                 :            : 
    2234         [ #  # ]:          0 :                 if (!status)
    2235                 :            :                         /* lock acquired */
    2236                 :            :                         break;
    2237                 :            :         }
    2238         [ #  # ]:          0 :         if (status && status != ICE_ERR_AQ_NO_WORK)
    2239         [ #  # ]:          0 :                 ice_debug(hw, ICE_DBG_RES, "resource acquire timed out.\n");
    2240                 :            : 
    2241                 :          0 : ice_acquire_res_exit:
    2242         [ #  # ]:          0 :         if (status == ICE_ERR_AQ_NO_WORK) {
    2243         [ #  # ]:          0 :                 if (access == ICE_RES_WRITE)
    2244         [ #  # ]:          0 :                         ice_debug(hw, ICE_DBG_RES, "resource indicates no work to do.\n");
    2245                 :            :                 else
    2246         [ #  # ]:          0 :                         ice_debug(hw, ICE_DBG_RES, "Warning: ICE_ERR_AQ_NO_WORK not expected\n");
    2247                 :            :         }
    2248                 :          0 :         return status;
    2249                 :            : }
    2250                 :            : 
    2251                 :            : /**
    2252                 :            :  * ice_release_res
    2253                 :            :  * @hw: pointer to the HW structure
    2254                 :            :  * @res: resource ID
    2255                 :            :  *
    2256                 :            :  * This function will release a resource using the proper Admin Command.
    2257                 :            :  */
    2258                 :          0 : void ice_release_res(struct ice_hw *hw, enum ice_aq_res_ids res)
    2259                 :            : {
    2260                 :            :         enum ice_status status;
    2261                 :            :         u32 total_delay = 0;
    2262                 :            : 
    2263         [ #  # ]:          0 :         ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);
    2264                 :            : 
    2265                 :          0 :         status = ice_aq_release_res(hw, res, 0, NULL);
    2266                 :            : 
    2267                 :            :         /* there are some rare cases when trying to release the resource
    2268                 :            :          * results in an admin queue timeout, so handle them correctly
    2269                 :            :          */
    2270         [ #  # ]:          0 :         while ((status == ICE_ERR_AQ_TIMEOUT) &&
    2271         [ #  # ]:          0 :                (total_delay < hw->adminq.sq_cmd_timeout)) {
    2272                 :          0 :                 ice_msec_delay(1, true);
    2273                 :          0 :                 status = ice_aq_release_res(hw, res, 0, NULL);
    2274                 :          0 :                 total_delay++;
    2275                 :            :         }
    2276                 :          0 : }
    2277                 :            : 
    2278                 :            : /**
    2279                 :            :  * ice_aq_alloc_free_res - command to allocate/free resources
    2280                 :            :  * @hw: pointer to the HW struct
    2281                 :            :  * @num_entries: number of resource entries in buffer
    2282                 :            :  * @buf: Indirect buffer to hold data parameters and response
    2283                 :            :  * @buf_size: size of buffer for indirect commands
    2284                 :            :  * @opc: pass in the command opcode
    2285                 :            :  * @cd: pointer to command details structure or NULL
    2286                 :            :  *
    2287                 :            :  * Helper function to allocate/free resources using the admin queue commands
    2288                 :            :  */
    2289                 :            : enum ice_status
    2290                 :          0 : ice_aq_alloc_free_res(struct ice_hw *hw, u16 num_entries,
    2291                 :            :                       struct ice_aqc_alloc_free_res_elem *buf, u16 buf_size,
    2292                 :            :                       enum ice_adminq_opc opc, struct ice_sq_cd *cd)
    2293                 :            : {
    2294                 :            :         struct ice_aqc_alloc_free_res_cmd *cmd;
    2295                 :            :         struct ice_aq_desc desc;
    2296                 :            : 
    2297         [ #  # ]:          0 :         ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);
    2298                 :            : 
    2299                 :            :         cmd = &desc.params.sw_res_ctrl;
    2300                 :            : 
    2301         [ #  # ]:          0 :         if (!buf)
    2302                 :            :                 return ICE_ERR_PARAM;
    2303                 :            : 
    2304         [ #  # ]:          0 :         if (buf_size < FLEX_ARRAY_SIZE(buf, elem, num_entries))
    2305                 :            :                 return ICE_ERR_PARAM;
    2306                 :            : 
    2307                 :          0 :         ice_fill_dflt_direct_cmd_desc(&desc, opc);
    2308                 :            : 
    2309                 :          0 :         desc.flags |= CPU_TO_LE16(ICE_AQ_FLAG_RD);
    2310                 :            : 
    2311                 :          0 :         cmd->num_entries = CPU_TO_LE16(num_entries);
    2312                 :            : 
    2313                 :          0 :         return ice_aq_send_cmd(hw, &desc, buf, buf_size, cd);
    2314                 :            : }
    2315                 :            : 
    2316                 :            : /**
    2317                 :            :  * ice_alloc_hw_res - allocate resource
    2318                 :            :  * @hw: pointer to the HW struct
    2319                 :            :  * @type: type of resource
    2320                 :            :  * @num: number of resources to allocate
    2321                 :            :  * @btm: allocate from bottom
    2322                 :            :  * @res: pointer to array that will receive the resources
    2323                 :            :  */
    2324                 :            : enum ice_status
    2325                 :          0 : ice_alloc_hw_res(struct ice_hw *hw, u16 type, u16 num, bool btm, u16 *res)
    2326                 :            : {
    2327                 :            :         struct ice_aqc_alloc_free_res_elem *buf;
    2328                 :            :         enum ice_status status;
    2329                 :            :         u16 buf_len;
    2330                 :            : 
    2331                 :          0 :         buf_len = ice_struct_size(buf, elem, num);
    2332                 :          0 :         buf = (struct ice_aqc_alloc_free_res_elem *)ice_malloc(hw, buf_len);
    2333         [ #  # ]:          0 :         if (!buf)
    2334                 :            :                 return ICE_ERR_NO_MEMORY;
    2335                 :            : 
    2336                 :            :         /* Prepare buffer to allocate resource. */
    2337                 :          0 :         buf->num_elems = CPU_TO_LE16(num);
    2338                 :          0 :         buf->res_type = CPU_TO_LE16(type | ICE_AQC_RES_TYPE_FLAG_DEDICATED |
    2339                 :            :                                     ICE_AQC_RES_TYPE_FLAG_IGNORE_INDEX);
    2340         [ #  # ]:          0 :         if (btm)
    2341                 :          0 :                 buf->res_type |= CPU_TO_LE16(ICE_AQC_RES_TYPE_FLAG_SCAN_BOTTOM);
    2342                 :            : 
    2343                 :          0 :         status = ice_aq_alloc_free_res(hw, 1, buf, buf_len,
    2344                 :            :                                        ice_aqc_opc_alloc_res, NULL);
    2345         [ #  # ]:          0 :         if (status)
    2346                 :          0 :                 goto ice_alloc_res_exit;
    2347                 :            : 
    2348         [ #  # ]:          0 :         ice_memcpy(res, buf->elem, sizeof(*buf->elem) * num,
    2349                 :            :                    ICE_NONDMA_TO_NONDMA);
    2350                 :            : 
    2351                 :          0 : ice_alloc_res_exit:
    2352                 :          0 :         ice_free(hw, buf);
    2353                 :          0 :         return status;
    2354                 :            : }
    2355                 :            : 
    2356                 :            : /**
    2357                 :            :  * ice_free_hw_res - free allocated HW resource
    2358                 :            :  * @hw: pointer to the HW struct
    2359                 :            :  * @type: type of resource to free
    2360                 :            :  * @num: number of resources
    2361                 :            :  * @res: pointer to array that contains the resources to free
    2362                 :            :  */
    2363                 :          0 : enum ice_status ice_free_hw_res(struct ice_hw *hw, u16 type, u16 num, u16 *res)
    2364                 :            : {
    2365                 :            :         struct ice_aqc_alloc_free_res_elem *buf;
    2366                 :            :         enum ice_status status;
    2367                 :            :         u16 buf_len;
    2368                 :            : 
    2369                 :          0 :         buf_len = ice_struct_size(buf, elem, num);
    2370                 :          0 :         buf = (struct ice_aqc_alloc_free_res_elem *)ice_malloc(hw, buf_len);
    2371         [ #  # ]:          0 :         if (!buf)
    2372                 :            :                 return ICE_ERR_NO_MEMORY;
    2373                 :            : 
    2374                 :            :         /* Prepare buffer to free resource. */
    2375                 :          0 :         buf->num_elems = CPU_TO_LE16(num);
    2376                 :          0 :         buf->res_type = CPU_TO_LE16(type);
    2377         [ #  # ]:          0 :         ice_memcpy(buf->elem, res, sizeof(*buf->elem) * num,
    2378                 :            :                    ICE_NONDMA_TO_NONDMA);
    2379                 :            : 
    2380                 :          0 :         status = ice_aq_alloc_free_res(hw, num, buf, buf_len,
    2381                 :            :                                        ice_aqc_opc_free_res, NULL);
    2382         [ #  # ]:          0 :         if (status)
    2383         [ #  # ]:          0 :                 ice_debug(hw, ICE_DBG_SW, "CQ CMD Buffer:\n");
    2384                 :            : 
    2385                 :          0 :         ice_free(hw, buf);
    2386                 :          0 :         return status;
    2387                 :            : }
    2388                 :            : 
    2389                 :            : /**
    2390                 :            :  * ice_get_num_per_func - determine number of resources per PF
    2391                 :            :  * @hw: pointer to the HW structure
    2392                 :            :  * @max: value to be evenly split between each PF
    2393                 :            :  *
    2394                 :            :  * Determine the number of valid functions by going through the bitmap returned
    2395                 :            :  * from parsing capabilities and use this to calculate the number of resources
    2396                 :            :  * per PF based on the max value passed in.
    2397                 :            :  */
    2398                 :            : static u32 ice_get_num_per_func(struct ice_hw *hw, u32 max)
    2399                 :            : {
    2400                 :            :         u8 funcs;
    2401                 :            : 
    2402                 :            : #define ICE_CAPS_VALID_FUNCS_M  0xFF
    2403                 :          0 :         funcs = ice_hweight8(hw->dev_caps.common_cap.valid_functions &
    2404                 :            :                              ICE_CAPS_VALID_FUNCS_M);
    2405                 :            : 
    2406   [ #  #  #  # ]:          0 :         if (!funcs)
    2407                 :            :                 return 0;
    2408                 :            : 
    2409                 :          0 :         return max / funcs;
    2410                 :            : }
    2411                 :            : 
    2412                 :            : /**
    2413                 :            :  * ice_parse_common_caps - parse common device/function capabilities
    2414                 :            :  * @hw: pointer to the HW struct
    2415                 :            :  * @caps: pointer to common capabilities structure
    2416                 :            :  * @elem: the capability element to parse
    2417                 :            :  * @prefix: message prefix for tracing capabilities
    2418                 :            :  *
    2419                 :            :  * Given a capability element, extract relevant details into the common
    2420                 :            :  * capability structure.
    2421                 :            :  *
    2422                 :            :  * Returns: true if the capability matches one of the common capability ids,
    2423                 :            :  * false otherwise.
    2424                 :            :  */
    2425                 :            : static bool
    2426                 :          0 : ice_parse_common_caps(struct ice_hw *hw, struct ice_hw_common_caps *caps,
    2427                 :            :                       struct ice_aqc_list_caps_elem *elem, const char *prefix)
    2428                 :            : {
    2429                 :          0 :         u32 logical_id = LE32_TO_CPU(elem->logical_id);
    2430                 :          0 :         u32 phys_id = LE32_TO_CPU(elem->phys_id);
    2431                 :          0 :         u32 number = LE32_TO_CPU(elem->number);
    2432                 :          0 :         u16 cap = LE16_TO_CPU(elem->cap);
    2433                 :            :         bool found = true;
    2434                 :            : 
    2435   [ #  #  #  #  :          0 :         switch (cap) {
          #  #  #  #  #  
             #  #  #  # ]
    2436                 :          0 :         case ICE_AQC_CAPS_VALID_FUNCTIONS:
    2437                 :          0 :                 caps->valid_functions = number;
    2438         [ #  # ]:          0 :                 ice_debug(hw, ICE_DBG_INIT, "%s: valid_functions (bitmap) = %d\n", prefix,
    2439                 :            :                           caps->valid_functions);
    2440                 :            :                 break;
    2441                 :          0 :         case ICE_AQC_CAPS_DCB:
    2442                 :          0 :                 caps->dcb = (number == 1);
    2443                 :          0 :                 caps->active_tc_bitmap = logical_id;
    2444                 :          0 :                 caps->maxtc = phys_id;
    2445         [ #  # ]:          0 :                 ice_debug(hw, ICE_DBG_INIT, "%s: dcb = %d\n", prefix, caps->dcb);
    2446         [ #  # ]:          0 :                 ice_debug(hw, ICE_DBG_INIT, "%s: active_tc_bitmap = %d\n", prefix,
    2447                 :            :                           caps->active_tc_bitmap);
    2448         [ #  # ]:          0 :                 ice_debug(hw, ICE_DBG_INIT, "%s: maxtc = %d\n", prefix, caps->maxtc);
    2449                 :            :                 break;
    2450                 :          0 :         case ICE_AQC_CAPS_RSS:
    2451                 :          0 :                 caps->rss_table_size = number;
    2452                 :          0 :                 caps->rss_table_entry_width = logical_id;
    2453         [ #  # ]:          0 :                 ice_debug(hw, ICE_DBG_INIT, "%s: rss_table_size = %d\n", prefix,
    2454                 :            :                           caps->rss_table_size);
    2455         [ #  # ]:          0 :                 ice_debug(hw, ICE_DBG_INIT, "%s: rss_table_entry_width = %d\n", prefix,
    2456                 :            :                           caps->rss_table_entry_width);
    2457                 :            :                 break;
    2458                 :          0 :         case ICE_AQC_CAPS_RXQS:
    2459                 :          0 :                 caps->num_rxq = number;
    2460                 :          0 :                 caps->rxq_first_id = phys_id;
    2461         [ #  # ]:          0 :                 ice_debug(hw, ICE_DBG_INIT, "%s: num_rxq = %d\n", prefix,
    2462                 :            :                           caps->num_rxq);
    2463         [ #  # ]:          0 :                 ice_debug(hw, ICE_DBG_INIT, "%s: rxq_first_id = %d\n", prefix,
    2464                 :            :                           caps->rxq_first_id);
    2465                 :            :                 break;
    2466                 :          0 :         case ICE_AQC_CAPS_TXQS:
    2467                 :          0 :                 caps->num_txq = number;
    2468                 :          0 :                 caps->txq_first_id = phys_id;
    2469         [ #  # ]:          0 :                 ice_debug(hw, ICE_DBG_INIT, "%s: num_txq = %d\n", prefix,
    2470                 :            :                           caps->num_txq);
    2471         [ #  # ]:          0 :                 ice_debug(hw, ICE_DBG_INIT, "%s: txq_first_id = %d\n", prefix,
    2472                 :            :                           caps->txq_first_id);
    2473                 :            :                 break;
    2474                 :          0 :         case ICE_AQC_CAPS_MSIX:
    2475                 :          0 :                 caps->num_msix_vectors = number;
    2476                 :          0 :                 caps->msix_vector_first_id = phys_id;
    2477         [ #  # ]:          0 :                 ice_debug(hw, ICE_DBG_INIT, "%s: num_msix_vectors = %d\n", prefix,
    2478                 :            :                           caps->num_msix_vectors);
    2479         [ #  # ]:          0 :                 ice_debug(hw, ICE_DBG_INIT, "%s: msix_vector_first_id = %d\n", prefix,
    2480                 :            :                           caps->msix_vector_first_id);
    2481                 :            :                 break;
    2482                 :          0 :         case ICE_AQC_CAPS_NVM_MGMT:
    2483                 :          0 :                 caps->sec_rev_disabled =
    2484                 :            :                         (number & ICE_NVM_MGMT_SEC_REV_DISABLED) ?
    2485                 :          0 :                         true : false;
    2486         [ #  # ]:          0 :                 ice_debug(hw, ICE_DBG_INIT, "%s: sec_rev_disabled = %d\n", prefix,
    2487                 :            :                           caps->sec_rev_disabled);
    2488                 :          0 :                 caps->update_disabled =
    2489                 :            :                         (number & ICE_NVM_MGMT_UPDATE_DISABLED) ?
    2490                 :          0 :                         true : false;
    2491         [ #  # ]:          0 :                 ice_debug(hw, ICE_DBG_INIT, "%s: update_disabled = %d\n", prefix,
    2492                 :            :                           caps->update_disabled);
    2493                 :          0 :                 caps->nvm_unified_update =
    2494                 :            :                         (number & ICE_NVM_MGMT_UNIFIED_UPD_SUPPORT) ?
    2495                 :          0 :                         true : false;
    2496         [ #  # ]:          0 :                 ice_debug(hw, ICE_DBG_INIT, "%s: nvm_unified_update = %d\n", prefix,
    2497                 :            :                           caps->nvm_unified_update);
    2498                 :            :                 break;
    2499                 :          0 :         case ICE_AQC_CAPS_MAX_MTU:
    2500                 :          0 :                 caps->max_mtu = number;
    2501         [ #  # ]:          0 :                 ice_debug(hw, ICE_DBG_INIT, "%s: max_mtu = %d\n",
    2502                 :            :                           prefix, caps->max_mtu);
    2503                 :            :                 break;
    2504                 :          0 :         case ICE_AQC_CAPS_PCIE_RESET_AVOIDANCE:
    2505                 :          0 :                 caps->pcie_reset_avoidance = (number > 0);
    2506         [ #  # ]:          0 :                 ice_debug(hw, ICE_DBG_INIT,
    2507                 :            :                           "%s: pcie_reset_avoidance = %d\n", prefix,
    2508                 :            :                           caps->pcie_reset_avoidance);
    2509                 :            :                 break;
    2510                 :          0 :         case ICE_AQC_CAPS_POST_UPDATE_RESET_RESTRICT:
    2511                 :          0 :                 caps->reset_restrict_support = (number == 1);
    2512         [ #  # ]:          0 :                 ice_debug(hw, ICE_DBG_INIT,
    2513                 :            :                           "%s: reset_restrict_support = %d\n", prefix,
    2514                 :            :                           caps->reset_restrict_support);
    2515                 :            :                 break;
    2516                 :          0 :         case ICE_AQC_CAPS_EXT_TOPO_DEV_IMG0:
    2517                 :            :         case ICE_AQC_CAPS_EXT_TOPO_DEV_IMG1:
    2518                 :            :         case ICE_AQC_CAPS_EXT_TOPO_DEV_IMG2:
    2519                 :            :         case ICE_AQC_CAPS_EXT_TOPO_DEV_IMG3:
    2520                 :            :         {
    2521                 :          0 :                 u8 index = (u8)(cap - ICE_AQC_CAPS_EXT_TOPO_DEV_IMG0);
    2522                 :            : 
    2523                 :          0 :                 caps->ext_topo_dev_img_ver_high[index] = number;
    2524                 :          0 :                 caps->ext_topo_dev_img_ver_low[index] = logical_id;
    2525                 :          0 :                 caps->ext_topo_dev_img_part_num[index] =
    2526                 :          0 :                         (phys_id & ICE_EXT_TOPO_DEV_IMG_PART_NUM_M) >>
    2527                 :            :                         ICE_EXT_TOPO_DEV_IMG_PART_NUM_S;
    2528                 :          0 :                 caps->ext_topo_dev_img_load_en[index] =
    2529                 :          0 :                         (phys_id & ICE_EXT_TOPO_DEV_IMG_LOAD_EN) != 0;
    2530                 :          0 :                 caps->ext_topo_dev_img_prog_en[index] =
    2531                 :          0 :                         (phys_id & ICE_EXT_TOPO_DEV_IMG_PROG_EN) != 0;
    2532         [ #  # ]:          0 :                 ice_debug(hw, ICE_DBG_INIT,
    2533                 :            :                           "%s: ext_topo_dev_img_ver_high[%d] = %d\n",
    2534                 :            :                           prefix, index,
    2535                 :            :                           caps->ext_topo_dev_img_ver_high[index]);
    2536         [ #  # ]:          0 :                 ice_debug(hw, ICE_DBG_INIT,
    2537                 :            :                           "%s: ext_topo_dev_img_ver_low[%d] = %d\n",
    2538                 :            :                           prefix, index,
    2539                 :            :                           caps->ext_topo_dev_img_ver_low[index]);
    2540         [ #  # ]:          0 :                 ice_debug(hw, ICE_DBG_INIT,
    2541                 :            :                           "%s: ext_topo_dev_img_part_num[%d] = %d\n",
    2542                 :            :                           prefix, index,
    2543                 :            :                           caps->ext_topo_dev_img_part_num[index]);
    2544         [ #  # ]:          0 :                 ice_debug(hw, ICE_DBG_INIT,
    2545                 :            :                           "%s: ext_topo_dev_img_load_en[%d] = %d\n",
    2546                 :            :                           prefix, index,
    2547                 :            :                           caps->ext_topo_dev_img_load_en[index]);
    2548         [ #  # ]:          0 :                 ice_debug(hw, ICE_DBG_INIT,
    2549                 :            :                           "%s: ext_topo_dev_img_prog_en[%d] = %d\n",
    2550                 :            :                           prefix, index,
    2551                 :            :                           caps->ext_topo_dev_img_prog_en[index]);
    2552                 :            :                 break;
    2553                 :            :         }
    2554                 :          0 :         case ICE_AQC_CAPS_TX_SCHED_TOPO_COMP_MODE:
    2555                 :          0 :                 caps->tx_sched_topo_comp_mode_en = (number == 1);
    2556                 :          0 :                 break;
    2557                 :            :         default:
    2558                 :            :                 /* Not one of the recognized common capabilities */
    2559                 :            :                 found = false;
    2560                 :            :         }
    2561                 :            : 
    2562                 :          0 :         return found;
    2563                 :            : }
    2564                 :            : 
    2565                 :            : /**
    2566                 :            :  * ice_recalc_port_limited_caps - Recalculate port limited capabilities
    2567                 :            :  * @hw: pointer to the HW structure
    2568                 :            :  * @caps: pointer to capabilities structure to fix
    2569                 :            :  *
    2570                 :            :  * Re-calculate the capabilities that are dependent on the number of physical
    2571                 :            :  * ports; i.e. some features are not supported or function differently on
    2572                 :            :  * devices with more than 4 ports.
    2573                 :            :  */
    2574                 :            : static void
    2575                 :          0 : ice_recalc_port_limited_caps(struct ice_hw *hw, struct ice_hw_common_caps *caps)
    2576                 :            : {
    2577                 :            :         /* This assumes device capabilities are always scanned before function
    2578                 :            :          * capabilities during the initialization flow.
    2579                 :            :          */
    2580         [ #  # ]:          0 :         if (hw->dev_caps.num_funcs > 4) {
    2581                 :            :                 /* Max 4 TCs per port */
    2582                 :          0 :                 caps->maxtc = 4;
    2583         [ #  # ]:          0 :                 ice_debug(hw, ICE_DBG_INIT, "reducing maxtc to %d (based on #ports)\n",
    2584                 :            :                           caps->maxtc);
    2585                 :            :         }
    2586                 :          0 : }
    2587                 :            : 
    2588                 :            : /**
    2589                 :            :  * ice_parse_vsi_func_caps - Parse ICE_AQC_CAPS_VSI function caps
    2590                 :            :  * @hw: pointer to the HW struct
    2591                 :            :  * @func_p: pointer to function capabilities structure
    2592                 :            :  * @cap: pointer to the capability element to parse
    2593                 :            :  *
    2594                 :            :  * Extract function capabilities for ICE_AQC_CAPS_VSI.
    2595                 :            :  */
    2596                 :            : static void
    2597                 :          0 : ice_parse_vsi_func_caps(struct ice_hw *hw, struct ice_hw_func_caps *func_p,
    2598                 :            :                         struct ice_aqc_list_caps_elem *cap)
    2599                 :            : {
    2600                 :          0 :         func_p->guar_num_vsi = ice_get_num_per_func(hw, ICE_MAX_VSI);
    2601         [ #  # ]:          0 :         ice_debug(hw, ICE_DBG_INIT, "func caps: guar_num_vsi (fw) = %d\n",
    2602                 :            :                   LE32_TO_CPU(cap->number));
    2603         [ #  # ]:          0 :         ice_debug(hw, ICE_DBG_INIT, "func caps: guar_num_vsi = %d\n",
    2604                 :            :                   func_p->guar_num_vsi);
    2605                 :          0 : }
    2606                 :            : 
    2607                 :            : /**
    2608                 :            :  * ice_parse_1588_func_caps - Parse ICE_AQC_CAPS_1588 function caps
    2609                 :            :  * @hw: pointer to the HW struct
    2610                 :            :  * @func_p: pointer to function capabilities structure
    2611                 :            :  * @cap: pointer to the capability element to parse
    2612                 :            :  *
    2613                 :            :  * Extract function capabilities for ICE_AQC_CAPS_1588.
    2614                 :            :  */
    2615                 :            : static void
    2616                 :          0 : ice_parse_1588_func_caps(struct ice_hw *hw, struct ice_hw_func_caps *func_p,
    2617                 :            :                          struct ice_aqc_list_caps_elem *cap)
    2618                 :            : {
    2619                 :            :         struct ice_ts_func_info *info = &func_p->ts_func_info;
    2620                 :          0 :         u32 number = LE32_TO_CPU(cap->number);
    2621                 :            :         u8 clk_freq;
    2622                 :            : 
    2623         [ #  # ]:          0 :         ice_debug(hw, ICE_DBG_INIT, "1588 func caps: raw value %x\n", number);
    2624                 :            : 
    2625                 :          0 :         info->ena = ((number & ICE_TS_FUNC_ENA_M) != 0);
    2626                 :          0 :         func_p->common_cap.ieee_1588 = info->ena;
    2627                 :            : 
    2628                 :          0 :         info->src_tmr_owned = ((number & ICE_TS_SRC_TMR_OWND_M) != 0);
    2629                 :          0 :         info->tmr_ena = ((number & ICE_TS_TMR_ENA_M) != 0);
    2630                 :          0 :         info->tmr_index_owned = ((number & ICE_TS_TMR_IDX_OWND_M) != 0);
    2631                 :          0 :         info->tmr_index_assoc = ((number & ICE_TS_TMR_IDX_ASSOC_M) != 0);
    2632                 :            : 
    2633                 :          0 :         info->clk_src = ((number & ICE_TS_CLK_SRC_M) != 0);
    2634                 :          0 :         clk_freq = (number & ICE_TS_CLK_FREQ_M) >> ICE_TS_CLK_FREQ_S;
    2635         [ #  # ]:          0 :         if (clk_freq < NUM_ICE_TIME_REF_FREQ) {
    2636                 :          0 :                 info->time_ref = (enum ice_time_ref_freq)clk_freq;
    2637                 :            :         } else {
    2638                 :            :                 /* Unknown clock frequency, so assume a (probably incorrect)
    2639                 :            :                  * default to avoid out-of-bounds look ups of frequency
    2640                 :            :                  * related information.
    2641                 :            :                  */
    2642         [ #  # ]:          0 :                 ice_debug(hw, ICE_DBG_INIT, "1588 func caps: unknown clock frequency %u\n",
    2643                 :            :                           clk_freq);
    2644                 :          0 :                 info->time_ref = ICE_TIME_REF_FREQ_25_000;
    2645                 :            :         }
    2646                 :            : 
    2647         [ #  # ]:          0 :         ice_debug(hw, ICE_DBG_INIT, "func caps: ieee_1588 = %u\n",
    2648                 :            :                   func_p->common_cap.ieee_1588);
    2649         [ #  # ]:          0 :         ice_debug(hw, ICE_DBG_INIT, "func caps: src_tmr_owned = %u\n",
    2650                 :            :                   info->src_tmr_owned);
    2651         [ #  # ]:          0 :         ice_debug(hw, ICE_DBG_INIT, "func caps: tmr_ena = %u\n",
    2652                 :            :                   info->tmr_ena);
    2653         [ #  # ]:          0 :         ice_debug(hw, ICE_DBG_INIT, "func caps: tmr_index_owned = %u\n",
    2654                 :            :                   info->tmr_index_owned);
    2655         [ #  # ]:          0 :         ice_debug(hw, ICE_DBG_INIT, "func caps: tmr_index_assoc = %u\n",
    2656                 :            :                   info->tmr_index_assoc);
    2657         [ #  # ]:          0 :         ice_debug(hw, ICE_DBG_INIT, "func caps: clk_freq = %u\n",
    2658                 :            :                   clk_freq);
    2659         [ #  # ]:          0 :         ice_debug(hw, ICE_DBG_INIT, "func caps: clk_src = %u\n",
    2660                 :            :                   info->clk_src);
    2661                 :          0 : }
    2662                 :            : 
    2663                 :            : /**
    2664                 :            :  * ice_parse_fdir_func_caps - Parse ICE_AQC_CAPS_FD function caps
    2665                 :            :  * @hw: pointer to the HW struct
    2666                 :            :  * @func_p: pointer to function capabilities structure
    2667                 :            :  *
    2668                 :            :  * Extract function capabilities for ICE_AQC_CAPS_FD.
    2669                 :            :  */
    2670                 :            : static void
    2671                 :          0 : ice_parse_fdir_func_caps(struct ice_hw *hw, struct ice_hw_func_caps *func_p)
    2672                 :            : {
    2673                 :            :         u32 reg_val, val;
    2674                 :            : 
    2675         [ #  # ]:          0 :         if (hw->dcf_enabled)
    2676                 :            :                 return;
    2677                 :          0 :         reg_val = rd32(hw, GLQF_FD_SIZE);
    2678                 :          0 :         val = (reg_val & GLQF_FD_SIZE_FD_GSIZE_M) >>
    2679                 :            :                 GLQF_FD_SIZE_FD_GSIZE_S;
    2680                 :          0 :         func_p->fd_fltr_guar =
    2681                 :            :                 ice_get_num_per_func(hw, val);
    2682                 :          0 :         val = (reg_val & GLQF_FD_SIZE_FD_BSIZE_M) >>
    2683                 :            :                 GLQF_FD_SIZE_FD_BSIZE_S;
    2684                 :          0 :         func_p->fd_fltr_best_effort = val;
    2685                 :            : 
    2686         [ #  # ]:          0 :         ice_debug(hw, ICE_DBG_INIT, "func caps: fd_fltr_guar = %d\n",
    2687                 :            :                   func_p->fd_fltr_guar);
    2688         [ #  # ]:          0 :         ice_debug(hw, ICE_DBG_INIT, "func caps: fd_fltr_best_effort = %d\n",
    2689                 :            :                   func_p->fd_fltr_best_effort);
    2690                 :            : }
    2691                 :            : 
    2692                 :            : /**
    2693                 :            :  * ice_parse_func_caps - Parse function capabilities
    2694                 :            :  * @hw: pointer to the HW struct
    2695                 :            :  * @func_p: pointer to function capabilities structure
    2696                 :            :  * @buf: buffer containing the function capability records
    2697                 :            :  * @cap_count: the number of capabilities
    2698                 :            :  *
    2699                 :            :  * Helper function to parse function (0x000A) capabilities list. For
    2700                 :            :  * capabilities shared between device and function, this relies on
    2701                 :            :  * ice_parse_common_caps.
    2702                 :            :  *
    2703                 :            :  * Loop through the list of provided capabilities and extract the relevant
    2704                 :            :  * data into the function capabilities structured.
    2705                 :            :  */
    2706                 :            : static void
    2707                 :          0 : ice_parse_func_caps(struct ice_hw *hw, struct ice_hw_func_caps *func_p,
    2708                 :            :                     void *buf, u32 cap_count)
    2709                 :            : {
    2710                 :            :         struct ice_aqc_list_caps_elem *cap_resp;
    2711                 :            :         u32 i;
    2712                 :            : 
    2713                 :            :         cap_resp = (struct ice_aqc_list_caps_elem *)buf;
    2714                 :            : 
    2715                 :            :         ice_memset(func_p, 0, sizeof(*func_p), ICE_NONDMA_MEM);
    2716                 :            : 
    2717         [ #  # ]:          0 :         for (i = 0; i < cap_count; i++) {
    2718                 :          0 :                 u16 cap = LE16_TO_CPU(cap_resp[i].cap);
    2719                 :            :                 bool found;
    2720                 :            : 
    2721                 :          0 :                 found = ice_parse_common_caps(hw, &func_p->common_cap,
    2722                 :            :                                               &cap_resp[i], "func caps");
    2723                 :            : 
    2724   [ #  #  #  # ]:          0 :                 switch (cap) {
    2725                 :          0 :                 case ICE_AQC_CAPS_VSI:
    2726                 :          0 :                         ice_parse_vsi_func_caps(hw, func_p, &cap_resp[i]);
    2727                 :          0 :                         break;
    2728                 :          0 :                 case ICE_AQC_CAPS_1588:
    2729                 :          0 :                         ice_parse_1588_func_caps(hw, func_p, &cap_resp[i]);
    2730                 :          0 :                         break;
    2731                 :          0 :                 case ICE_AQC_CAPS_FD:
    2732                 :          0 :                         ice_parse_fdir_func_caps(hw, func_p);
    2733                 :          0 :                         break;
    2734                 :          0 :                 default:
    2735                 :            :                         /* Don't list common capabilities as unknown */
    2736         [ #  # ]:          0 :                         if (!found)
    2737         [ #  # ]:          0 :                                 ice_debug(hw, ICE_DBG_INIT, "func caps: unknown capability[%d]: 0x%x\n",
    2738                 :            :                                           i, cap);
    2739                 :            :                         break;
    2740                 :            :                 }
    2741                 :            :         }
    2742                 :            : 
    2743                 :          0 :         ice_recalc_port_limited_caps(hw, &func_p->common_cap);
    2744                 :          0 : }
    2745                 :            : 
    2746                 :            : /**
    2747                 :            :  * ice_func_id_to_logical_id - map from function id to logical pf id
    2748                 :            :  * @active_function_bitmap: active function bitmap
    2749                 :            :  * @pf_id: function number of device
    2750                 :            :  */
    2751                 :            : static int ice_func_id_to_logical_id(u32 active_function_bitmap, u8 pf_id)
    2752                 :            : {
    2753                 :            :         u8 logical_id = 0;
    2754                 :            :         u8 i;
    2755                 :            : 
    2756         [ #  # ]:          0 :         for (i = 0; i < pf_id; i++)
    2757         [ #  # ]:          0 :                 if (active_function_bitmap & BIT(i))
    2758                 :          0 :                         logical_id++;
    2759                 :            : 
    2760                 :            :         return logical_id;
    2761                 :            : }
    2762                 :            : 
    2763                 :            : /**
    2764                 :            :  * ice_parse_valid_functions_cap - Parse ICE_AQC_CAPS_VALID_FUNCTIONS caps
    2765                 :            :  * @hw: pointer to the HW struct
    2766                 :            :  * @dev_p: pointer to device capabilities structure
    2767                 :            :  * @cap: capability element to parse
    2768                 :            :  *
    2769                 :            :  * Parse ICE_AQC_CAPS_VALID_FUNCTIONS for device capabilities.
    2770                 :            :  */
    2771                 :            : static void
    2772                 :          0 : ice_parse_valid_functions_cap(struct ice_hw *hw, struct ice_hw_dev_caps *dev_p,
    2773                 :            :                               struct ice_aqc_list_caps_elem *cap)
    2774                 :            : {
    2775                 :          0 :         u32 number = LE32_TO_CPU(cap->number);
    2776                 :            : 
    2777                 :          0 :         dev_p->num_funcs = ice_hweight32(number);
    2778         [ #  # ]:          0 :         ice_debug(hw, ICE_DBG_INIT, "dev caps: num_funcs = %d\n",
    2779                 :            :                   dev_p->num_funcs);
    2780                 :            : 
    2781                 :          0 :         hw->logical_pf_id = ice_func_id_to_logical_id(number, hw->pf_id);
    2782                 :          0 : }
    2783                 :            : 
    2784                 :            : /**
    2785                 :            :  * ice_parse_vsi_dev_caps - Parse ICE_AQC_CAPS_VSI device caps
    2786                 :            :  * @hw: pointer to the HW struct
    2787                 :            :  * @dev_p: pointer to device capabilities structure
    2788                 :            :  * @cap: capability element to parse
    2789                 :            :  *
    2790                 :            :  * Parse ICE_AQC_CAPS_VSI for device capabilities.
    2791                 :            :  */
    2792                 :            : static void
    2793                 :          0 : ice_parse_vsi_dev_caps(struct ice_hw *hw, struct ice_hw_dev_caps *dev_p,
    2794                 :            :                        struct ice_aqc_list_caps_elem *cap)
    2795                 :            : {
    2796                 :          0 :         u32 number = LE32_TO_CPU(cap->number);
    2797                 :            : 
    2798                 :          0 :         dev_p->num_vsi_allocd_to_host = number;
    2799         [ #  # ]:          0 :         ice_debug(hw, ICE_DBG_INIT, "dev caps: num_vsi_allocd_to_host = %d\n",
    2800                 :            :                   dev_p->num_vsi_allocd_to_host);
    2801                 :          0 : }
    2802                 :            : 
    2803                 :            : /**
    2804                 :            :  * ice_parse_1588_dev_caps - Parse ICE_AQC_CAPS_1588 device caps
    2805                 :            :  * @hw: pointer to the HW struct
    2806                 :            :  * @dev_p: pointer to device capabilities structure
    2807                 :            :  * @cap: capability element to parse
    2808                 :            :  *
    2809                 :            :  * Parse ICE_AQC_CAPS_1588 for device capabilities.
    2810                 :            :  */
    2811                 :            : static void
    2812                 :          0 : ice_parse_1588_dev_caps(struct ice_hw *hw, struct ice_hw_dev_caps *dev_p,
    2813                 :            :                         struct ice_aqc_list_caps_elem *cap)
    2814                 :            : {
    2815                 :            :         struct ice_ts_dev_info *info = &dev_p->ts_dev_info;
    2816                 :          0 :         u32 phys_id = LE32_TO_CPU(cap->phys_id);
    2817                 :          0 :         u32 number = LE32_TO_CPU(cap->number);
    2818                 :            : 
    2819                 :          0 :         info->ena = ((number & ICE_TS_DEV_ENA_M) != 0);
    2820                 :          0 :         dev_p->common_cap.ieee_1588 = info->ena;
    2821                 :            : 
    2822                 :          0 :         info->tmr0_owner = number & ICE_TS_TMR0_OWNR_M;
    2823                 :          0 :         info->tmr0_owned = ((number & ICE_TS_TMR0_OWND_M) != 0);
    2824                 :          0 :         info->tmr0_ena = ((number & ICE_TS_TMR0_ENA_M) != 0);
    2825                 :            : 
    2826                 :          0 :         info->tmr1_owner = (number & ICE_TS_TMR1_OWNR_M) >> ICE_TS_TMR1_OWNR_S;
    2827                 :          0 :         info->tmr1_owned = ((number & ICE_TS_TMR1_OWND_M) != 0);
    2828                 :          0 :         info->tmr1_ena = ((number & ICE_TS_TMR1_ENA_M) != 0);
    2829                 :            : 
    2830                 :          0 :         info->ts_ll_read = ((number & ICE_TS_LL_TX_TS_READ_M) != 0);
    2831                 :            : 
    2832                 :          0 :         info->tmr_own_map = phys_id;
    2833                 :            : 
    2834         [ #  # ]:          0 :         ice_debug(hw, ICE_DBG_INIT, "dev caps: ieee_1588 = %u\n",
    2835                 :            :                   dev_p->common_cap.ieee_1588);
    2836         [ #  # ]:          0 :         ice_debug(hw, ICE_DBG_INIT, "dev caps: tmr0_owner = %u\n",
    2837                 :            :                   info->tmr0_owner);
    2838         [ #  # ]:          0 :         ice_debug(hw, ICE_DBG_INIT, "dev caps: tmr0_owned = %u\n",
    2839                 :            :                   info->tmr0_owned);
    2840         [ #  # ]:          0 :         ice_debug(hw, ICE_DBG_INIT, "dev caps: tmr0_ena = %u\n",
    2841                 :            :                   info->tmr0_ena);
    2842         [ #  # ]:          0 :         ice_debug(hw, ICE_DBG_INIT, "dev caps: tmr1_owner = %u\n",
    2843                 :            :                   info->tmr1_owner);
    2844         [ #  # ]:          0 :         ice_debug(hw, ICE_DBG_INIT, "dev caps: tmr1_owned = %u\n",
    2845                 :            :                   info->tmr1_owned);
    2846         [ #  # ]:          0 :         ice_debug(hw, ICE_DBG_INIT, "dev caps: tmr1_ena = %u\n",
    2847                 :            :                   info->tmr1_ena);
    2848         [ #  # ]:          0 :         ice_debug(hw, ICE_DBG_INIT, "dev caps: ts_ll_read = %u\n",
    2849                 :            :                   info->ts_ll_read);
    2850         [ #  # ]:          0 :         ice_debug(hw, ICE_DBG_INIT, "dev caps: tmr_own_map = %u\n",
    2851                 :            :                   info->tmr_own_map);
    2852                 :          0 : }
    2853                 :            : 
    2854                 :            : /**
    2855                 :            :  * ice_parse_fdir_dev_caps - Parse ICE_AQC_CAPS_FD device caps
    2856                 :            :  * @hw: pointer to the HW struct
    2857                 :            :  * @dev_p: pointer to device capabilities structure
    2858                 :            :  * @cap: capability element to parse
    2859                 :            :  *
    2860                 :            :  * Parse ICE_AQC_CAPS_FD for device capabilities.
    2861                 :            :  */
    2862                 :            : static void
    2863                 :          0 : ice_parse_fdir_dev_caps(struct ice_hw *hw, struct ice_hw_dev_caps *dev_p,
    2864                 :            :                         struct ice_aqc_list_caps_elem *cap)
    2865                 :            : {
    2866                 :          0 :         u32 number = LE32_TO_CPU(cap->number);
    2867                 :            : 
    2868                 :          0 :         dev_p->num_flow_director_fltr = number;
    2869         [ #  # ]:          0 :         ice_debug(hw, ICE_DBG_INIT, "dev caps: num_flow_director_fltr = %d\n",
    2870                 :            :                   dev_p->num_flow_director_fltr);
    2871                 :          0 : }
    2872                 :            : 
    2873                 :            : /**
    2874                 :            :  * ice_parse_nac_topo_dev_caps - Parse ICE_AQC_CAPS_NAC_TOPOLOGY cap
    2875                 :            :  * @hw: pointer to the HW struct
    2876                 :            :  * @dev_p: pointer to device capabilities structure
    2877                 :            :  * @cap: capability element to parse
    2878                 :            :  *
    2879                 :            :  * Parse ICE_AQC_CAPS_NAC_TOPOLOGY for device capabilities.
    2880                 :            :  */
    2881                 :            : static void
    2882                 :          0 : ice_parse_nac_topo_dev_caps(struct ice_hw *hw, struct ice_hw_dev_caps *dev_p,
    2883                 :            :                             struct ice_aqc_list_caps_elem *cap)
    2884                 :            : {
    2885                 :          0 :         dev_p->nac_topo.mode = LE32_TO_CPU(cap->number);
    2886                 :          0 :         dev_p->nac_topo.id = LE32_TO_CPU(cap->phys_id) & ICE_NAC_TOPO_ID_M;
    2887                 :            : 
    2888         [ #  # ]:          0 :         ice_debug(hw, ICE_DBG_INIT, "dev caps: nac topology is_primary = %d\n",
    2889                 :            :                   !!(dev_p->nac_topo.mode & ICE_NAC_TOPO_PRIMARY_M));
    2890         [ #  # ]:          0 :         ice_debug(hw, ICE_DBG_INIT, "dev caps: nac topology is_dual = %d\n",
    2891                 :            :                   !!(dev_p->nac_topo.mode & ICE_NAC_TOPO_DUAL_M));
    2892         [ #  # ]:          0 :         ice_debug(hw, ICE_DBG_INIT, "dev caps: nac topology id = %d\n",
    2893                 :            :                   dev_p->nac_topo.id);
    2894                 :          0 : }
    2895                 :            : 
    2896                 :            : /**
    2897                 :            :  * ice_parse_dev_caps - Parse device capabilities
    2898                 :            :  * @hw: pointer to the HW struct
    2899                 :            :  * @dev_p: pointer to device capabilities structure
    2900                 :            :  * @buf: buffer containing the device capability records
    2901                 :            :  * @cap_count: the number of capabilities
    2902                 :            :  *
    2903                 :            :  * Helper device to parse device (0x000B) capabilities list. For
    2904                 :            :  * capabilities shared between device and function, this relies on
    2905                 :            :  * ice_parse_common_caps.
    2906                 :            :  *
    2907                 :            :  * Loop through the list of provided capabilities and extract the relevant
    2908                 :            :  * data into the device capabilities structured.
    2909                 :            :  */
    2910                 :            : static void
    2911                 :          0 : ice_parse_dev_caps(struct ice_hw *hw, struct ice_hw_dev_caps *dev_p,
    2912                 :            :                    void *buf, u32 cap_count)
    2913                 :            : {
    2914                 :            :         struct ice_aqc_list_caps_elem *cap_resp;
    2915                 :            :         u32 i;
    2916                 :            : 
    2917                 :            :         cap_resp = (struct ice_aqc_list_caps_elem *)buf;
    2918                 :            : 
    2919                 :            :         ice_memset(dev_p, 0, sizeof(*dev_p), ICE_NONDMA_MEM);
    2920                 :            : 
    2921         [ #  # ]:          0 :         for (i = 0; i < cap_count; i++) {
    2922                 :          0 :                 u16 cap = LE16_TO_CPU(cap_resp[i].cap);
    2923                 :            :                 bool found;
    2924                 :            : 
    2925                 :          0 :                 found = ice_parse_common_caps(hw, &dev_p->common_cap,
    2926                 :            :                                               &cap_resp[i], "dev caps");
    2927                 :            : 
    2928   [ #  #  #  #  :          0 :                 switch (cap) {
                   #  # ]
    2929                 :          0 :                 case ICE_AQC_CAPS_VALID_FUNCTIONS:
    2930                 :          0 :                         ice_parse_valid_functions_cap(hw, dev_p, &cap_resp[i]);
    2931                 :          0 :                         break;
    2932                 :          0 :                 case ICE_AQC_CAPS_VSI:
    2933                 :          0 :                         ice_parse_vsi_dev_caps(hw, dev_p, &cap_resp[i]);
    2934                 :          0 :                         break;
    2935                 :          0 :                 case ICE_AQC_CAPS_1588:
    2936                 :          0 :                         ice_parse_1588_dev_caps(hw, dev_p, &cap_resp[i]);
    2937                 :          0 :                         break;
    2938                 :          0 :                 case  ICE_AQC_CAPS_FD:
    2939                 :          0 :                         ice_parse_fdir_dev_caps(hw, dev_p, &cap_resp[i]);
    2940                 :          0 :                         break;
    2941                 :          0 :                 case ICE_AQC_CAPS_NAC_TOPOLOGY:
    2942                 :          0 :                         ice_parse_nac_topo_dev_caps(hw, dev_p, &cap_resp[i]);
    2943                 :          0 :                         break;
    2944                 :          0 :                 default:
    2945                 :            :                         /* Don't list common capabilities as unknown */
    2946         [ #  # ]:          0 :                         if (!found)
    2947         [ #  # ]:          0 :                                 ice_debug(hw, ICE_DBG_INIT, "dev caps: unknown capability[%d]: 0x%x\n",
    2948                 :            :                                           i, cap);
    2949                 :            :                         break;
    2950                 :            :                 }
    2951                 :            :         }
    2952                 :            : 
    2953                 :          0 :         ice_recalc_port_limited_caps(hw, &dev_p->common_cap);
    2954                 :          0 : }
    2955                 :            : 
    2956                 :            : /**
    2957                 :            :  * ice_aq_list_caps - query function/device capabilities
    2958                 :            :  * @hw: pointer to the HW struct
    2959                 :            :  * @buf: a buffer to hold the capabilities
    2960                 :            :  * @buf_size: size of the buffer
    2961                 :            :  * @cap_count: if not NULL, set to the number of capabilities reported
    2962                 :            :  * @opc: capabilities type to discover, device or function
    2963                 :            :  * @cd: pointer to command details structure or NULL
    2964                 :            :  *
    2965                 :            :  * Get the function (0x000A) or device (0x000B) capabilities description from
    2966                 :            :  * firmware and store it in the buffer.
    2967                 :            :  *
    2968                 :            :  * If the cap_count pointer is not NULL, then it is set to the number of
    2969                 :            :  * capabilities firmware will report. Note that if the buffer size is too
    2970                 :            :  * small, it is possible the command will return ICE_AQ_ERR_ENOMEM. The
    2971                 :            :  * cap_count will still be updated in this case. It is recommended that the
    2972                 :            :  * buffer size be set to ICE_AQ_MAX_BUF_LEN (the largest possible buffer that
    2973                 :            :  * firmware could return) to avoid this.
    2974                 :            :  */
    2975                 :            : static enum ice_status
    2976                 :            : ice_aq_list_caps(struct ice_hw *hw, void *buf, u16 buf_size, u32 *cap_count,
    2977                 :            :                  enum ice_adminq_opc opc, struct ice_sq_cd *cd)
    2978                 :            : {
    2979                 :            :         struct ice_aqc_list_caps *cmd;
    2980                 :            :         struct ice_aq_desc desc;
    2981                 :            :         enum ice_status status;
    2982                 :            : 
    2983                 :            :         cmd = &desc.params.get_cap;
    2984                 :            : 
    2985                 :            :         if (opc != ice_aqc_opc_list_func_caps &&
    2986                 :            :             opc != ice_aqc_opc_list_dev_caps)
    2987                 :            :                 return ICE_ERR_PARAM;
    2988                 :            : 
    2989                 :          0 :         ice_fill_dflt_direct_cmd_desc(&desc, opc);
    2990                 :          0 :         status = ice_aq_send_cmd(hw, &desc, buf, buf_size, cd);
    2991                 :            : 
    2992                 :            :         if (cap_count)
    2993                 :          0 :                 *cap_count = LE32_TO_CPU(cmd->count);
    2994                 :            : 
    2995                 :            :         return status;
    2996                 :            : }
    2997                 :            : 
    2998                 :            : /**
    2999                 :            :  * ice_discover_dev_caps - Read and extract device capabilities
    3000                 :            :  * @hw: pointer to the hardware structure
    3001                 :            :  * @dev_caps: pointer to device capabilities structure
    3002                 :            :  *
    3003                 :            :  * Read the device capabilities and extract them into the dev_caps structure
    3004                 :            :  * for later use.
    3005                 :            :  */
    3006                 :            : static enum ice_status
    3007                 :          0 : ice_discover_dev_caps(struct ice_hw *hw, struct ice_hw_dev_caps *dev_caps)
    3008                 :            : {
    3009                 :            :         enum ice_status status;
    3010                 :            :         u32 cap_count = 0;
    3011                 :            :         void *cbuf;
    3012                 :            : 
    3013                 :          0 :         cbuf = ice_malloc(hw, ICE_AQ_MAX_BUF_LEN);
    3014         [ #  # ]:          0 :         if (!cbuf)
    3015                 :            :                 return ICE_ERR_NO_MEMORY;
    3016                 :            : 
    3017                 :            :         /* Although the driver doesn't know the number of capabilities the
    3018                 :            :          * device will return, we can simply send a 4KB buffer, the maximum
    3019                 :            :          * possible size that firmware can return.
    3020                 :            :          */
    3021                 :            :         cap_count = ICE_AQ_MAX_BUF_LEN / sizeof(struct ice_aqc_list_caps_elem);
    3022                 :            : 
    3023                 :            :         status = ice_aq_list_caps(hw, cbuf, ICE_AQ_MAX_BUF_LEN, &cap_count,
    3024                 :            :                                   ice_aqc_opc_list_dev_caps, NULL);
    3025         [ #  # ]:          0 :         if (!status)
    3026                 :          0 :                 ice_parse_dev_caps(hw, dev_caps, cbuf, cap_count);
    3027                 :          0 :         ice_free(hw, cbuf);
    3028                 :            : 
    3029                 :          0 :         return status;
    3030                 :            : }
    3031                 :            : 
    3032                 :            : /**
    3033                 :            :  * ice_discover_func_caps - Read and extract function capabilities
    3034                 :            :  * @hw: pointer to the hardware structure
    3035                 :            :  * @func_caps: pointer to function capabilities structure
    3036                 :            :  *
    3037                 :            :  * Read the function capabilities and extract them into the func_caps structure
    3038                 :            :  * for later use.
    3039                 :            :  */
    3040                 :            : static enum ice_status
    3041                 :          0 : ice_discover_func_caps(struct ice_hw *hw, struct ice_hw_func_caps *func_caps)
    3042                 :            : {
    3043                 :            :         enum ice_status status;
    3044                 :            :         u32 cap_count = 0;
    3045                 :            :         void *cbuf;
    3046                 :            : 
    3047                 :          0 :         cbuf = ice_malloc(hw, ICE_AQ_MAX_BUF_LEN);
    3048         [ #  # ]:          0 :         if (!cbuf)
    3049                 :            :                 return ICE_ERR_NO_MEMORY;
    3050                 :            : 
    3051                 :            :         /* Although the driver doesn't know the number of capabilities the
    3052                 :            :          * device will return, we can simply send a 4KB buffer, the maximum
    3053                 :            :          * possible size that firmware can return.
    3054                 :            :          */
    3055                 :            :         cap_count = ICE_AQ_MAX_BUF_LEN / sizeof(struct ice_aqc_list_caps_elem);
    3056                 :            : 
    3057                 :            :         status = ice_aq_list_caps(hw, cbuf, ICE_AQ_MAX_BUF_LEN, &cap_count,
    3058                 :            :                                   ice_aqc_opc_list_func_caps, NULL);
    3059         [ #  # ]:          0 :         if (!status)
    3060                 :          0 :                 ice_parse_func_caps(hw, func_caps, cbuf, cap_count);
    3061                 :          0 :         ice_free(hw, cbuf);
    3062                 :            : 
    3063                 :          0 :         return status;
    3064                 :            : }
    3065                 :            : 
    3066                 :            : /**
    3067                 :            :  * ice_set_safe_mode_caps - Override dev/func capabilities when in safe mode
    3068                 :            :  * @hw: pointer to the hardware structure
    3069                 :            :  */
    3070                 :          0 : void ice_set_safe_mode_caps(struct ice_hw *hw)
    3071                 :            : {
    3072                 :          0 :         struct ice_hw_func_caps *func_caps = &hw->func_caps;
    3073                 :          0 :         struct ice_hw_dev_caps *dev_caps = &hw->dev_caps;
    3074                 :            :         struct ice_hw_common_caps cached_caps;
    3075                 :            :         u32 num_funcs;
    3076                 :            : 
    3077                 :            :         /* cache some func_caps values that should be restored after memset */
    3078                 :          0 :         cached_caps = func_caps->common_cap;
    3079                 :            : 
    3080                 :            :         /* unset func capabilities */
    3081                 :            :         memset(func_caps, 0, sizeof(*func_caps));
    3082                 :            : 
    3083                 :            : #define ICE_RESTORE_FUNC_CAP(name) \
    3084                 :            :         func_caps->common_cap.name = cached_caps.name
    3085                 :            : 
    3086                 :            :         /* restore cached values */
    3087                 :          0 :         ICE_RESTORE_FUNC_CAP(valid_functions);
    3088                 :          0 :         ICE_RESTORE_FUNC_CAP(txq_first_id);
    3089                 :          0 :         ICE_RESTORE_FUNC_CAP(rxq_first_id);
    3090                 :          0 :         ICE_RESTORE_FUNC_CAP(msix_vector_first_id);
    3091                 :          0 :         ICE_RESTORE_FUNC_CAP(max_mtu);
    3092                 :          0 :         ICE_RESTORE_FUNC_CAP(nvm_unified_update);
    3093                 :            : 
    3094                 :            :         /* one Tx and one Rx queue in safe mode */
    3095                 :          0 :         func_caps->common_cap.num_rxq = 1;
    3096                 :          0 :         func_caps->common_cap.num_txq = 1;
    3097                 :            : 
    3098                 :            :         /* two MSIX vectors, one for traffic and one for misc causes */
    3099                 :          0 :         func_caps->common_cap.num_msix_vectors = 2;
    3100                 :          0 :         func_caps->guar_num_vsi = 1;
    3101                 :            : 
    3102                 :            :         /* cache some dev_caps values that should be restored after memset */
    3103                 :          0 :         cached_caps = dev_caps->common_cap;
    3104                 :          0 :         num_funcs = dev_caps->num_funcs;
    3105                 :            : 
    3106                 :            :         /* unset dev capabilities */
    3107                 :            :         memset(dev_caps, 0, sizeof(*dev_caps));
    3108                 :            : 
    3109                 :            : #define ICE_RESTORE_DEV_CAP(name) \
    3110                 :            :         dev_caps->common_cap.name = cached_caps.name
    3111                 :            : 
    3112                 :            :         /* restore cached values */
    3113                 :          0 :         ICE_RESTORE_DEV_CAP(valid_functions);
    3114                 :          0 :         ICE_RESTORE_DEV_CAP(txq_first_id);
    3115                 :          0 :         ICE_RESTORE_DEV_CAP(rxq_first_id);
    3116                 :          0 :         ICE_RESTORE_DEV_CAP(msix_vector_first_id);
    3117                 :          0 :         ICE_RESTORE_DEV_CAP(max_mtu);
    3118                 :          0 :         ICE_RESTORE_DEV_CAP(nvm_unified_update);
    3119                 :          0 :         dev_caps->num_funcs = num_funcs;
    3120                 :            : 
    3121                 :            :         /* one Tx and one Rx queue per function in safe mode */
    3122                 :          0 :         dev_caps->common_cap.num_rxq = num_funcs;
    3123                 :          0 :         dev_caps->common_cap.num_txq = num_funcs;
    3124                 :            : 
    3125                 :            :         /* two MSIX vectors per function */
    3126                 :          0 :         dev_caps->common_cap.num_msix_vectors = 2 * num_funcs;
    3127                 :          0 : }
    3128                 :            : 
    3129                 :            : /**
    3130                 :            :  * ice_get_caps - get info about the HW
    3131                 :            :  * @hw: pointer to the hardware structure
    3132                 :            :  */
    3133                 :          0 : enum ice_status ice_get_caps(struct ice_hw *hw)
    3134                 :            : {
    3135                 :            :         enum ice_status status;
    3136                 :            : 
    3137                 :          0 :         status = ice_discover_dev_caps(hw, &hw->dev_caps);
    3138         [ #  # ]:          0 :         if (status)
    3139                 :            :                 return status;
    3140                 :            : 
    3141                 :          0 :         return ice_discover_func_caps(hw, &hw->func_caps);
    3142                 :            : }
    3143                 :            : 
    3144                 :            : /**
    3145                 :            :  * ice_aq_manage_mac_write - manage MAC address write command
    3146                 :            :  * @hw: pointer to the HW struct
    3147                 :            :  * @mac_addr: MAC address to be written as LAA/LAA+WoL/Port address
    3148                 :            :  * @flags: flags to control write behavior
    3149                 :            :  * @cd: pointer to command details structure or NULL
    3150                 :            :  *
    3151                 :            :  * This function is used to write MAC address to the NVM (0x0108).
    3152                 :            :  */
    3153                 :            : enum ice_status
    3154                 :          0 : ice_aq_manage_mac_write(struct ice_hw *hw, const u8 *mac_addr, u8 flags,
    3155                 :            :                         struct ice_sq_cd *cd)
    3156                 :            : {
    3157                 :            :         struct ice_aqc_manage_mac_write *cmd;
    3158                 :            :         struct ice_aq_desc desc;
    3159                 :            : 
    3160                 :            :         cmd = &desc.params.mac_write;
    3161                 :          0 :         ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_manage_mac_write);
    3162                 :            : 
    3163         [ #  # ]:          0 :         cmd->flags = flags;
    3164                 :            :         ice_memcpy(cmd->mac_addr, mac_addr, ETH_ALEN, ICE_NONDMA_TO_NONDMA);
    3165                 :            : 
    3166                 :          0 :         return ice_aq_send_cmd(hw, &desc, NULL, 0, cd);
    3167                 :            : }
    3168                 :            : 
    3169                 :            : /**
    3170                 :            :  * ice_aq_clear_pxe_mode
    3171                 :            :  * @hw: pointer to the HW struct
    3172                 :            :  *
    3173                 :            :  * Tell the firmware that the driver is taking over from PXE (0x0110).
    3174                 :            :  */
    3175                 :          0 : static enum ice_status ice_aq_clear_pxe_mode(struct ice_hw *hw)
    3176                 :            : {
    3177                 :            :         struct ice_aq_desc desc;
    3178                 :            : 
    3179                 :          0 :         ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_clear_pxe_mode);
    3180                 :          0 :         desc.params.clear_pxe.rx_cnt = ICE_AQC_CLEAR_PXE_RX_CNT;
    3181                 :            : 
    3182                 :          0 :         return ice_aq_send_cmd(hw, &desc, NULL, 0, NULL);
    3183                 :            : }
    3184                 :            : 
    3185                 :            : /**
    3186                 :            :  * ice_clear_pxe_mode - clear pxe operations mode
    3187                 :            :  * @hw: pointer to the HW struct
    3188                 :            :  *
    3189                 :            :  * Make sure all PXE mode settings are cleared, including things
    3190                 :            :  * like descriptor fetch/write-back mode.
    3191                 :            :  */
    3192                 :          0 : void ice_clear_pxe_mode(struct ice_hw *hw)
    3193                 :            : {
    3194         [ #  # ]:          0 :         if (ice_check_sq_alive(hw, &hw->adminq))
    3195                 :          0 :                 ice_aq_clear_pxe_mode(hw);
    3196                 :          0 : }
    3197                 :            : 
    3198                 :            : /**
    3199                 :            :  * ice_aq_set_port_params - set physical port parameters.
    3200                 :            :  * @pi: pointer to the port info struct
    3201                 :            :  * @bad_frame_vsi: defines the VSI to which bad frames are forwarded
    3202                 :            :  * @save_bad_pac: if set packets with errors are forwarded to the bad frames VSI
    3203                 :            :  * @pad_short_pac: if set transmit packets smaller than 60 bytes are padded
    3204                 :            :  * @double_vlan: if set double VLAN is enabled
    3205                 :            :  * @cd: pointer to command details structure or NULL
    3206                 :            :  *
    3207                 :            :  * Set Physical port parameters (0x0203)
    3208                 :            :  */
    3209                 :            : enum ice_status
    3210                 :          0 : ice_aq_set_port_params(struct ice_port_info *pi, u16 bad_frame_vsi,
    3211                 :            :                        bool save_bad_pac, bool pad_short_pac, bool double_vlan,
    3212                 :            :                        struct ice_sq_cd *cd)
    3213                 :            : 
    3214                 :            : {
    3215                 :            :         struct ice_aqc_set_port_params *cmd;
    3216                 :          0 :         struct ice_hw *hw = pi->hw;
    3217                 :            :         struct ice_aq_desc desc;
    3218                 :            :         u16 cmd_flags = 0;
    3219                 :            : 
    3220                 :            :         cmd = &desc.params.set_port_params;
    3221                 :            : 
    3222                 :          0 :         ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_set_port_params);
    3223                 :          0 :         cmd->bad_frame_vsi = CPU_TO_LE16(bad_frame_vsi);
    3224         [ #  # ]:          0 :         if (save_bad_pac)
    3225                 :            :                 cmd_flags |= ICE_AQC_SET_P_PARAMS_SAVE_BAD_PACKETS;
    3226         [ #  # ]:          0 :         if (pad_short_pac)
    3227                 :          0 :                 cmd_flags |= ICE_AQC_SET_P_PARAMS_PAD_SHORT_PACKETS;
    3228         [ #  # ]:          0 :         if (double_vlan)
    3229                 :          0 :                 cmd_flags |= ICE_AQC_SET_P_PARAMS_DOUBLE_VLAN_ENA;
    3230                 :          0 :         cmd->cmd_flags = CPU_TO_LE16(cmd_flags);
    3231                 :            : 
    3232                 :          0 :         return ice_aq_send_cmd(hw, &desc, NULL, 0, cd);
    3233                 :            : }
    3234                 :            : 
    3235                 :            : /**
    3236                 :            :  * ice_is_100m_speed_supported
    3237                 :            :  * @hw: pointer to the HW struct
    3238                 :            :  *
    3239                 :            :  * returns true if 100M speeds are supported by the device,
    3240                 :            :  * false otherwise.
    3241                 :            :  */
    3242                 :          0 : bool ice_is_100m_speed_supported(struct ice_hw *hw)
    3243                 :            : {
    3244         [ #  # ]:          0 :         switch (hw->device_id) {
    3245                 :            :         case ICE_DEV_ID_E822C_SGMII:
    3246                 :            :         case ICE_DEV_ID_E822L_SGMII:
    3247                 :            :         case ICE_DEV_ID_E823L_1GBE:
    3248                 :            :         case ICE_DEV_ID_E823C_SGMII:
    3249                 :            :                 return true;
    3250                 :          0 :         default:
    3251                 :          0 :                 return false;
    3252                 :            :         }
    3253                 :            : }
    3254                 :            : 
    3255                 :            : /**
    3256                 :            :  * ice_get_link_speed_based_on_phy_type - returns link speed
    3257                 :            :  * @phy_type_low: lower part of phy_type
    3258                 :            :  * @phy_type_high: higher part of phy_type
    3259                 :            :  *
    3260                 :            :  * This helper function will convert an entry in PHY type structure
    3261                 :            :  * [phy_type_low, phy_type_high] to its corresponding link speed.
    3262                 :            :  * Note: In the structure of [phy_type_low, phy_type_high], there should
    3263                 :            :  * be one bit set, as this function will convert one PHY type to its
    3264                 :            :  * speed.
    3265                 :            :  * If no bit gets set, ICE_LINK_SPEED_UNKNOWN will be returned
    3266                 :            :  * If more than one bit gets set, ICE_LINK_SPEED_UNKNOWN will be returned
    3267                 :            :  */
    3268                 :            : static u16
    3269                 :          0 : ice_get_link_speed_based_on_phy_type(u64 phy_type_low, u64 phy_type_high)
    3270                 :            : {
    3271                 :            :         u16 speed_phy_type_high = ICE_AQ_LINK_SPEED_UNKNOWN;
    3272                 :            :         u16 speed_phy_type_low = ICE_AQ_LINK_SPEED_UNKNOWN;
    3273                 :            : 
    3274   [ #  #  #  #  :          0 :         switch (phy_type_low) {
          #  #  #  #  #  
                      # ]
    3275                 :            :         case ICE_PHY_TYPE_LOW_100BASE_TX:
    3276                 :            :         case ICE_PHY_TYPE_LOW_100M_SGMII:
    3277                 :            :                 speed_phy_type_low = ICE_AQ_LINK_SPEED_100MB;
    3278                 :            :                 break;
    3279                 :          0 :         case ICE_PHY_TYPE_LOW_1000BASE_T:
    3280                 :            :         case ICE_PHY_TYPE_LOW_1000BASE_SX:
    3281                 :            :         case ICE_PHY_TYPE_LOW_1000BASE_LX:
    3282                 :            :         case ICE_PHY_TYPE_LOW_1000BASE_KX:
    3283                 :            :         case ICE_PHY_TYPE_LOW_1G_SGMII:
    3284                 :            :                 speed_phy_type_low = ICE_AQ_LINK_SPEED_1000MB;
    3285                 :          0 :                 break;
    3286                 :          0 :         case ICE_PHY_TYPE_LOW_2500BASE_T:
    3287                 :            :         case ICE_PHY_TYPE_LOW_2500BASE_X:
    3288                 :            :         case ICE_PHY_TYPE_LOW_2500BASE_KX:
    3289                 :            :                 speed_phy_type_low = ICE_AQ_LINK_SPEED_2500MB;
    3290                 :          0 :                 break;
    3291                 :          0 :         case ICE_PHY_TYPE_LOW_5GBASE_T:
    3292                 :            :         case ICE_PHY_TYPE_LOW_5GBASE_KR:
    3293                 :            :                 speed_phy_type_low = ICE_AQ_LINK_SPEED_5GB;
    3294                 :          0 :                 break;
    3295                 :          0 :         case ICE_PHY_TYPE_LOW_10GBASE_T:
    3296                 :            :         case ICE_PHY_TYPE_LOW_10G_SFI_DA:
    3297                 :            :         case ICE_PHY_TYPE_LOW_10GBASE_SR:
    3298                 :            :         case ICE_PHY_TYPE_LOW_10GBASE_LR:
    3299                 :            :         case ICE_PHY_TYPE_LOW_10GBASE_KR_CR1:
    3300                 :            :         case ICE_PHY_TYPE_LOW_10G_SFI_AOC_ACC:
    3301                 :            :         case ICE_PHY_TYPE_LOW_10G_SFI_C2C:
    3302                 :            :                 speed_phy_type_low = ICE_AQ_LINK_SPEED_10GB;
    3303                 :          0 :                 break;
    3304                 :          0 :         case ICE_PHY_TYPE_LOW_25GBASE_T:
    3305                 :            :         case ICE_PHY_TYPE_LOW_25GBASE_CR:
    3306                 :            :         case ICE_PHY_TYPE_LOW_25GBASE_CR_S:
    3307                 :            :         case ICE_PHY_TYPE_LOW_25GBASE_CR1:
    3308                 :            :         case ICE_PHY_TYPE_LOW_25GBASE_SR:
    3309                 :            :         case ICE_PHY_TYPE_LOW_25GBASE_LR:
    3310                 :            :         case ICE_PHY_TYPE_LOW_25GBASE_KR:
    3311                 :            :         case ICE_PHY_TYPE_LOW_25GBASE_KR_S:
    3312                 :            :         case ICE_PHY_TYPE_LOW_25GBASE_KR1:
    3313                 :            :         case ICE_PHY_TYPE_LOW_25G_AUI_AOC_ACC:
    3314                 :            :         case ICE_PHY_TYPE_LOW_25G_AUI_C2C:
    3315                 :            :                 speed_phy_type_low = ICE_AQ_LINK_SPEED_25GB;
    3316                 :          0 :                 break;
    3317                 :          0 :         case ICE_PHY_TYPE_LOW_40GBASE_CR4:
    3318                 :            :         case ICE_PHY_TYPE_LOW_40GBASE_SR4:
    3319                 :            :         case ICE_PHY_TYPE_LOW_40GBASE_LR4:
    3320                 :            :         case ICE_PHY_TYPE_LOW_40GBASE_KR4:
    3321                 :            :         case ICE_PHY_TYPE_LOW_40G_XLAUI_AOC_ACC:
    3322                 :            :         case ICE_PHY_TYPE_LOW_40G_XLAUI:
    3323                 :            :                 speed_phy_type_low = ICE_AQ_LINK_SPEED_40GB;
    3324                 :          0 :                 break;
    3325                 :          0 :         case ICE_PHY_TYPE_LOW_50GBASE_CR2:
    3326                 :            :         case ICE_PHY_TYPE_LOW_50GBASE_SR2:
    3327                 :            :         case ICE_PHY_TYPE_LOW_50GBASE_LR2:
    3328                 :            :         case ICE_PHY_TYPE_LOW_50GBASE_KR2:
    3329                 :            :         case ICE_PHY_TYPE_LOW_50G_LAUI2_AOC_ACC:
    3330                 :            :         case ICE_PHY_TYPE_LOW_50G_LAUI2:
    3331                 :            :         case ICE_PHY_TYPE_LOW_50G_AUI2_AOC_ACC:
    3332                 :            :         case ICE_PHY_TYPE_LOW_50G_AUI2:
    3333                 :            :         case ICE_PHY_TYPE_LOW_50GBASE_CP:
    3334                 :            :         case ICE_PHY_TYPE_LOW_50GBASE_SR:
    3335                 :            :         case ICE_PHY_TYPE_LOW_50GBASE_FR:
    3336                 :            :         case ICE_PHY_TYPE_LOW_50GBASE_LR:
    3337                 :            :         case ICE_PHY_TYPE_LOW_50GBASE_KR_PAM4:
    3338                 :            :         case ICE_PHY_TYPE_LOW_50G_AUI1_AOC_ACC:
    3339                 :            :         case ICE_PHY_TYPE_LOW_50G_AUI1:
    3340                 :            :                 speed_phy_type_low = ICE_AQ_LINK_SPEED_50GB;
    3341                 :          0 :                 break;
    3342                 :          0 :         case ICE_PHY_TYPE_LOW_100GBASE_CR4:
    3343                 :            :         case ICE_PHY_TYPE_LOW_100GBASE_SR4:
    3344                 :            :         case ICE_PHY_TYPE_LOW_100GBASE_LR4:
    3345                 :            :         case ICE_PHY_TYPE_LOW_100GBASE_KR4:
    3346                 :            :         case ICE_PHY_TYPE_LOW_100G_CAUI4_AOC_ACC:
    3347                 :            :         case ICE_PHY_TYPE_LOW_100G_CAUI4:
    3348                 :            :         case ICE_PHY_TYPE_LOW_100G_AUI4_AOC_ACC:
    3349                 :            :         case ICE_PHY_TYPE_LOW_100G_AUI4:
    3350                 :            :         case ICE_PHY_TYPE_LOW_100GBASE_CR_PAM4:
    3351                 :            :         case ICE_PHY_TYPE_LOW_100GBASE_KR_PAM4:
    3352                 :            :         case ICE_PHY_TYPE_LOW_100GBASE_CP2:
    3353                 :            :         case ICE_PHY_TYPE_LOW_100GBASE_SR2:
    3354                 :            :         case ICE_PHY_TYPE_LOW_100GBASE_DR:
    3355                 :            :                 speed_phy_type_low = ICE_AQ_LINK_SPEED_100GB;
    3356                 :          0 :                 break;
    3357                 :          0 :         default:
    3358                 :            :                 speed_phy_type_low = ICE_AQ_LINK_SPEED_UNKNOWN;
    3359                 :          0 :                 break;
    3360                 :            :         }
    3361                 :            : 
    3362         [ #  # ]:          0 :         switch (phy_type_high) {
    3363                 :            :         case ICE_PHY_TYPE_HIGH_100GBASE_KR2_PAM4:
    3364                 :            :         case ICE_PHY_TYPE_HIGH_100G_CAUI2_AOC_ACC:
    3365                 :            :         case ICE_PHY_TYPE_HIGH_100G_CAUI2:
    3366                 :            :         case ICE_PHY_TYPE_HIGH_100G_AUI2_AOC_ACC:
    3367                 :            :         case ICE_PHY_TYPE_HIGH_100G_AUI2:
    3368                 :            :                 speed_phy_type_high = ICE_AQ_LINK_SPEED_100GB;
    3369                 :            :                 break;
    3370                 :          0 :         default:
    3371                 :            :                 speed_phy_type_high = ICE_AQ_LINK_SPEED_UNKNOWN;
    3372                 :          0 :                 break;
    3373                 :            :         }
    3374                 :            : 
    3375                 :          0 :         if (speed_phy_type_low == ICE_AQ_LINK_SPEED_UNKNOWN &&
    3376         [ #  # ]:          0 :             speed_phy_type_high == ICE_AQ_LINK_SPEED_UNKNOWN)
    3377                 :            :                 return ICE_AQ_LINK_SPEED_UNKNOWN;
    3378                 :          0 :         else if (speed_phy_type_low != ICE_AQ_LINK_SPEED_UNKNOWN &&
    3379         [ #  # ]:          0 :                  speed_phy_type_high != ICE_AQ_LINK_SPEED_UNKNOWN)
    3380                 :            :                 return ICE_AQ_LINK_SPEED_UNKNOWN;
    3381         [ #  # ]:          0 :         else if (speed_phy_type_low != ICE_AQ_LINK_SPEED_UNKNOWN &&
    3382                 :            :                  speed_phy_type_high == ICE_AQ_LINK_SPEED_UNKNOWN)
    3383                 :            :                 return speed_phy_type_low;
    3384                 :            :         else
    3385                 :          0 :                 return speed_phy_type_high;
    3386                 :            : }
    3387                 :            : 
    3388                 :            : /**
    3389                 :            :  * ice_update_phy_type
    3390                 :            :  * @phy_type_low: pointer to the lower part of phy_type
    3391                 :            :  * @phy_type_high: pointer to the higher part of phy_type
    3392                 :            :  * @link_speeds_bitmap: targeted link speeds bitmap
    3393                 :            :  *
    3394                 :            :  * Note: For the link_speeds_bitmap structure, you can check it at
    3395                 :            :  * [ice_aqc_get_link_status->link_speed]. Caller can pass in
    3396                 :            :  * link_speeds_bitmap include multiple speeds.
    3397                 :            :  *
    3398                 :            :  * Each entry in this [phy_type_low, phy_type_high] structure will
    3399                 :            :  * present a certain link speed. This helper function will turn on bits
    3400                 :            :  * in [phy_type_low, phy_type_high] structure based on the value of
    3401                 :            :  * link_speeds_bitmap input parameter.
    3402                 :            :  */
    3403                 :            : void
    3404                 :          0 : ice_update_phy_type(u64 *phy_type_low, u64 *phy_type_high,
    3405                 :            :                     u16 link_speeds_bitmap)
    3406                 :            : {
    3407                 :            :         u64 pt_high;
    3408                 :            :         u64 pt_low;
    3409                 :            :         int index;
    3410                 :            :         u16 speed;
    3411                 :            : 
    3412                 :            :         /* We first check with low part of phy_type */
    3413         [ #  # ]:          0 :         for (index = 0; index <= ICE_PHY_TYPE_LOW_MAX_INDEX; index++) {
    3414                 :          0 :                 pt_low = BIT_ULL(index);
    3415                 :          0 :                 speed = ice_get_link_speed_based_on_phy_type(pt_low, 0);
    3416                 :            : 
    3417         [ #  # ]:          0 :                 if (link_speeds_bitmap & speed)
    3418                 :          0 :                         *phy_type_low |= BIT_ULL(index);
    3419                 :            :         }
    3420                 :            : 
    3421                 :            :         /* We then check with high part of phy_type */
    3422         [ #  # ]:          0 :         for (index = 0; index <= ICE_PHY_TYPE_HIGH_MAX_INDEX; index++) {
    3423                 :          0 :                 pt_high = BIT_ULL(index);
    3424                 :          0 :                 speed = ice_get_link_speed_based_on_phy_type(0, pt_high);
    3425                 :            : 
    3426         [ #  # ]:          0 :                 if (link_speeds_bitmap & speed)
    3427                 :          0 :                         *phy_type_high |= BIT_ULL(index);
    3428                 :            :         }
    3429                 :          0 : }
    3430                 :            : 
    3431                 :            : /**
    3432                 :            :  * ice_aq_set_phy_cfg
    3433                 :            :  * @hw: pointer to the HW struct
    3434                 :            :  * @pi: port info structure of the interested logical port
    3435                 :            :  * @cfg: structure with PHY configuration data to be set
    3436                 :            :  * @cd: pointer to command details structure or NULL
    3437                 :            :  *
    3438                 :            :  * Set the various PHY configuration parameters supported on the Port.
    3439                 :            :  * One or more of the Set PHY config parameters may be ignored in an MFP
    3440                 :            :  * mode as the PF may not have the privilege to set some of the PHY Config
    3441                 :            :  * parameters. This status will be indicated by the command response (0x0601).
    3442                 :            :  */
    3443                 :            : enum ice_status
    3444                 :          0 : ice_aq_set_phy_cfg(struct ice_hw *hw, struct ice_port_info *pi,
    3445                 :            :                    struct ice_aqc_set_phy_cfg_data *cfg, struct ice_sq_cd *cd)
    3446                 :            : {
    3447                 :            :         struct ice_aq_desc desc;
    3448                 :            :         enum ice_status status;
    3449                 :            : 
    3450         [ #  # ]:          0 :         if (!cfg)
    3451                 :            :                 return ICE_ERR_PARAM;
    3452                 :            : 
    3453                 :            :         /* Ensure that only valid bits of cfg->caps can be turned on. */
    3454         [ #  # ]:          0 :         if (cfg->caps & ~ICE_AQ_PHY_ENA_VALID_MASK) {
    3455         [ #  # ]:          0 :                 ice_debug(hw, ICE_DBG_PHY, "Invalid bit is set in ice_aqc_set_phy_cfg_data->caps : 0x%x\n",
    3456                 :            :                           cfg->caps);
    3457                 :            : 
    3458                 :          0 :                 cfg->caps &= ICE_AQ_PHY_ENA_VALID_MASK;
    3459                 :            :         }
    3460                 :            : 
    3461                 :          0 :         ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_set_phy_cfg);
    3462                 :          0 :         desc.params.set_phy.lport_num = pi->lport;
    3463                 :          0 :         desc.flags |= CPU_TO_LE16(ICE_AQ_FLAG_RD);
    3464                 :            : 
    3465         [ #  # ]:          0 :         ice_debug(hw, ICE_DBG_LINK, "set phy cfg\n");
    3466         [ #  # ]:          0 :         ice_debug(hw, ICE_DBG_LINK, "      phy_type_low = 0x%llx\n",
    3467                 :            :                   (unsigned long long)LE64_TO_CPU(cfg->phy_type_low));
    3468         [ #  # ]:          0 :         ice_debug(hw, ICE_DBG_LINK, "      phy_type_high = 0x%llx\n",
    3469                 :            :                   (unsigned long long)LE64_TO_CPU(cfg->phy_type_high));
    3470         [ #  # ]:          0 :         ice_debug(hw, ICE_DBG_LINK, "      caps = 0x%x\n", cfg->caps);
    3471         [ #  # ]:          0 :         ice_debug(hw, ICE_DBG_LINK, "      low_power_ctrl_an = 0x%x\n",
    3472                 :            :                   cfg->low_power_ctrl_an);
    3473         [ #  # ]:          0 :         ice_debug(hw, ICE_DBG_LINK, "      eee_cap = 0x%x\n", cfg->eee_cap);
    3474         [ #  # ]:          0 :         ice_debug(hw, ICE_DBG_LINK, "      eeer_value = 0x%x\n", cfg->eeer_value);
    3475         [ #  # ]:          0 :         ice_debug(hw, ICE_DBG_LINK, "      link_fec_opt = 0x%x\n",
    3476                 :            :                   cfg->link_fec_opt);
    3477                 :            : 
    3478                 :          0 :         status = ice_aq_send_cmd(hw, &desc, cfg, sizeof(*cfg), cd);
    3479                 :            : 
    3480         [ #  # ]:          0 :         if (hw->adminq.sq_last_status == ICE_AQ_RC_EMODE)
    3481                 :            :                 status = ICE_SUCCESS;
    3482                 :            : 
    3483         [ #  # ]:          0 :         if (!status)
    3484                 :          0 :                 pi->phy.curr_user_phy_cfg = *cfg;
    3485                 :            : 
    3486                 :            :         return status;
    3487                 :            : }
    3488                 :            : 
    3489                 :            : /**
    3490                 :            :  * ice_update_link_info - update status of the HW network link
    3491                 :            :  * @pi: port info structure of the interested logical port
    3492                 :            :  */
    3493                 :          0 : enum ice_status ice_update_link_info(struct ice_port_info *pi)
    3494                 :            : {
    3495                 :            :         struct ice_link_status *li;
    3496                 :            :         enum ice_status status;
    3497                 :            : 
    3498         [ #  # ]:          0 :         if (!pi)
    3499                 :            :                 return ICE_ERR_PARAM;
    3500                 :            : 
    3501                 :            :         li = &pi->phy.link_info;
    3502                 :            : 
    3503                 :          0 :         status = ice_aq_get_link_info(pi, true, NULL, NULL);
    3504         [ #  # ]:          0 :         if (status)
    3505                 :            :                 return status;
    3506                 :            : 
    3507         [ #  # ]:          0 :         if (li->link_info & ICE_AQ_MEDIA_AVAILABLE) {
    3508                 :            :                 struct ice_aqc_get_phy_caps_data *pcaps;
    3509                 :            :                 struct ice_hw *hw;
    3510                 :            : 
    3511                 :            :                 hw = pi->hw;
    3512                 :            :                 pcaps = (struct ice_aqc_get_phy_caps_data *)
    3513                 :          0 :                         ice_malloc(hw, sizeof(*pcaps));
    3514         [ #  # ]:          0 :                 if (!pcaps)
    3515                 :            :                         return ICE_ERR_NO_MEMORY;
    3516                 :            : 
    3517                 :          0 :                 status = ice_aq_get_phy_caps(pi, false, ICE_AQC_REPORT_TOPO_CAP_MEDIA,
    3518                 :            :                                              pcaps, NULL);
    3519                 :            : 
    3520         [ #  # ]:          0 :                 if (status == ICE_SUCCESS)
    3521         [ #  # ]:          0 :                         ice_memcpy(li->module_type, &pcaps->module_type,
    3522                 :            :                                    sizeof(li->module_type),
    3523                 :            :                                    ICE_NONDMA_TO_NONDMA);
    3524                 :            : 
    3525                 :          0 :                 ice_free(hw, pcaps);
    3526                 :            :         }
    3527                 :            : 
    3528                 :            :         return status;
    3529                 :            : }
    3530                 :            : 
    3531                 :            : /**
    3532                 :            :  * ice_cache_phy_user_req
    3533                 :            :  * @pi: port information structure
    3534                 :            :  * @cache_data: PHY logging data
    3535                 :            :  * @cache_mode: PHY logging mode
    3536                 :            :  *
    3537                 :            :  * Log the user request on (FC, FEC, SPEED) for later user.
    3538                 :            :  */
    3539                 :            : static void
    3540                 :            : ice_cache_phy_user_req(struct ice_port_info *pi,
    3541                 :            :                        struct ice_phy_cache_mode_data cache_data,
    3542                 :            :                        enum ice_phy_cache_mode cache_mode)
    3543                 :            : {
    3544                 :            :         if (!pi)
    3545                 :            :                 return;
    3546                 :            : 
    3547                 :            :         switch (cache_mode) {
    3548                 :            :         case ICE_FC_MODE:
    3549                 :          0 :                 pi->phy.curr_user_fc_req = cache_data.data.curr_user_fc_req;
    3550                 :            :                 break;
    3551                 :            :         case ICE_SPEED_MODE:
    3552                 :            :                 pi->phy.curr_user_speed_req =
    3553                 :            :                         cache_data.data.curr_user_speed_req;
    3554                 :            :                 break;
    3555                 :            :         case ICE_FEC_MODE:
    3556                 :            :                 pi->phy.curr_user_fec_req = cache_data.data.curr_user_fec_req;
    3557                 :            :                 break;
    3558                 :            :         default:
    3559                 :            :                 break;
    3560                 :            :         }
    3561                 :            : }
    3562                 :            : 
    3563                 :            : /**
    3564                 :            :  * ice_caps_to_fc_mode
    3565                 :            :  * @caps: PHY capabilities
    3566                 :            :  *
    3567                 :            :  * Convert PHY FC capabilities to ice FC mode
    3568                 :            :  */
    3569                 :          0 : enum ice_fc_mode ice_caps_to_fc_mode(u8 caps)
    3570                 :            : {
    3571         [ #  # ]:          0 :         if (caps & ICE_AQC_PHY_EN_TX_LINK_PAUSE &&
    3572                 :            :             caps & ICE_AQC_PHY_EN_RX_LINK_PAUSE)
    3573                 :            :                 return ICE_FC_FULL;
    3574                 :            : 
    3575         [ #  # ]:          0 :         if (caps & ICE_AQC_PHY_EN_TX_LINK_PAUSE)
    3576                 :            :                 return ICE_FC_TX_PAUSE;
    3577                 :            : 
    3578         [ #  # ]:          0 :         if (caps & ICE_AQC_PHY_EN_RX_LINK_PAUSE)
    3579                 :          0 :                 return ICE_FC_RX_PAUSE;
    3580                 :            : 
    3581                 :            :         return ICE_FC_NONE;
    3582                 :            : }
    3583                 :            : 
    3584                 :            : /**
    3585                 :            :  * ice_caps_to_fec_mode
    3586                 :            :  * @caps: PHY capabilities
    3587                 :            :  * @fec_options: Link FEC options
    3588                 :            :  *
    3589                 :            :  * Convert PHY FEC capabilities to ice FEC mode
    3590                 :            :  */
    3591                 :          0 : enum ice_fec_mode ice_caps_to_fec_mode(u8 caps, u8 fec_options)
    3592                 :            : {
    3593         [ #  # ]:          0 :         if (caps & ICE_AQC_PHY_EN_AUTO_FEC) {
    3594         [ #  # ]:          0 :                 if (fec_options & ICE_AQC_PHY_FEC_DIS)
    3595                 :            :                         return ICE_FEC_DIS_AUTO;
    3596                 :            :                 else
    3597                 :          0 :                         return ICE_FEC_AUTO;
    3598                 :            :         }
    3599                 :            : 
    3600         [ #  # ]:          0 :         if (fec_options & (ICE_AQC_PHY_FEC_10G_KR_40G_KR4_EN |
    3601                 :            :                            ICE_AQC_PHY_FEC_10G_KR_40G_KR4_REQ |
    3602                 :            :                            ICE_AQC_PHY_FEC_25G_KR_CLAUSE74_EN |
    3603                 :            :                            ICE_AQC_PHY_FEC_25G_KR_REQ))
    3604                 :            :                 return ICE_FEC_BASER;
    3605                 :            : 
    3606         [ #  # ]:          0 :         if (fec_options & (ICE_AQC_PHY_FEC_25G_RS_528_REQ |
    3607                 :            :                            ICE_AQC_PHY_FEC_25G_RS_544_REQ |
    3608                 :            :                            ICE_AQC_PHY_FEC_25G_RS_CLAUSE91_EN))
    3609                 :          0 :                 return ICE_FEC_RS;
    3610                 :            : 
    3611                 :            :         return ICE_FEC_NONE;
    3612                 :            : }
    3613                 :            : 
    3614                 :            : /**
    3615                 :            :  * ice_cfg_phy_fc - Configure PHY FC data based on FC mode
    3616                 :            :  * @pi: port information structure
    3617                 :            :  * @cfg: PHY configuration data to set FC mode
    3618                 :            :  * @req_mode: FC mode to configure
    3619                 :            :  */
    3620                 :            : static enum ice_status
    3621                 :          0 : ice_cfg_phy_fc(struct ice_port_info *pi, struct ice_aqc_set_phy_cfg_data *cfg,
    3622                 :            :                enum ice_fc_mode req_mode)
    3623                 :            : {
    3624                 :            :         struct ice_phy_cache_mode_data cache_data;
    3625                 :            :         u8 pause_mask = 0x0;
    3626                 :            : 
    3627         [ #  # ]:          0 :         if (!pi || !cfg)
    3628                 :            :                 return ICE_ERR_BAD_PTR;
    3629                 :            : 
    3630   [ #  #  #  #  :          0 :         switch (req_mode) {
                      # ]
    3631                 :          0 :         case ICE_FC_AUTO:
    3632                 :            :         {
    3633                 :            :                 struct ice_aqc_get_phy_caps_data *pcaps;
    3634                 :            :                 enum ice_status status;
    3635                 :            : 
    3636                 :            :                 pcaps = (struct ice_aqc_get_phy_caps_data *)
    3637                 :          0 :                         ice_malloc(pi->hw, sizeof(*pcaps));
    3638         [ #  # ]:          0 :                 if (!pcaps)
    3639                 :            :                         return ICE_ERR_NO_MEMORY;
    3640                 :            : 
    3641                 :            :                 /* Query the value of FC that both the NIC and attached media
    3642                 :            :                  * can do.
    3643                 :            :                  */
    3644                 :          0 :                 status = ice_aq_get_phy_caps(pi, false, ICE_AQC_REPORT_TOPO_CAP_MEDIA,
    3645                 :            :                                              pcaps, NULL);
    3646         [ #  # ]:          0 :                 if (status) {
    3647                 :          0 :                         ice_free(pi->hw, pcaps);
    3648                 :          0 :                         return status;
    3649                 :            :                 }
    3650                 :            : 
    3651                 :          0 :                 pause_mask |= pcaps->caps & ICE_AQC_PHY_EN_TX_LINK_PAUSE;
    3652                 :          0 :                 pause_mask |= pcaps->caps & ICE_AQC_PHY_EN_RX_LINK_PAUSE;
    3653                 :            : 
    3654                 :          0 :                 ice_free(pi->hw, pcaps);
    3655                 :          0 :                 break;
    3656                 :            :         }
    3657                 :          0 :         case ICE_FC_FULL:
    3658                 :            :                 pause_mask |= ICE_AQC_PHY_EN_TX_LINK_PAUSE;
    3659                 :            :                 pause_mask |= ICE_AQC_PHY_EN_RX_LINK_PAUSE;
    3660                 :          0 :                 break;
    3661                 :          0 :         case ICE_FC_RX_PAUSE:
    3662                 :            :                 pause_mask |= ICE_AQC_PHY_EN_RX_LINK_PAUSE;
    3663                 :          0 :                 break;
    3664                 :          0 :         case ICE_FC_TX_PAUSE:
    3665                 :            :                 pause_mask |= ICE_AQC_PHY_EN_TX_LINK_PAUSE;
    3666                 :          0 :                 break;
    3667                 :            :         default:
    3668                 :            :                 break;
    3669                 :            :         }
    3670                 :            : 
    3671                 :            :         /* clear the old pause settings */
    3672                 :          0 :         cfg->caps &= ~(ICE_AQC_PHY_EN_TX_LINK_PAUSE |
    3673                 :            :                 ICE_AQC_PHY_EN_RX_LINK_PAUSE);
    3674                 :            : 
    3675                 :            :         /* set the new capabilities */
    3676                 :          0 :         cfg->caps |= pause_mask;
    3677                 :            : 
    3678                 :            :         /* Cache user FC request */
    3679                 :            :         cache_data.data.curr_user_fc_req = req_mode;
    3680                 :            :         ice_cache_phy_user_req(pi, cache_data, ICE_FC_MODE);
    3681                 :            : 
    3682                 :          0 :         return ICE_SUCCESS;
    3683                 :            : }
    3684                 :            : 
    3685                 :            : /**
    3686                 :            :  * ice_set_fc
    3687                 :            :  * @pi: port information structure
    3688                 :            :  * @aq_failures: pointer to status code, specific to ice_set_fc routine
    3689                 :            :  * @ena_auto_link_update: enable automatic link update
    3690                 :            :  *
    3691                 :            :  * Set the requested flow control mode.
    3692                 :            :  */
    3693                 :            : enum ice_status
    3694                 :          0 : ice_set_fc(struct ice_port_info *pi, u8 *aq_failures, bool ena_auto_link_update)
    3695                 :            : {
    3696                 :          0 :         struct ice_aqc_set_phy_cfg_data  cfg = { 0 };
    3697                 :            :         struct ice_aqc_get_phy_caps_data *pcaps;
    3698                 :            :         enum ice_status status;
    3699                 :            :         struct ice_hw *hw;
    3700                 :            : 
    3701         [ #  # ]:          0 :         if (!pi || !aq_failures)
    3702                 :            :                 return ICE_ERR_BAD_PTR;
    3703                 :            : 
    3704                 :          0 :         *aq_failures = 0;
    3705                 :          0 :         hw = pi->hw;
    3706                 :            : 
    3707                 :            :         pcaps = (struct ice_aqc_get_phy_caps_data *)
    3708                 :          0 :                 ice_malloc(hw, sizeof(*pcaps));
    3709         [ #  # ]:          0 :         if (!pcaps)
    3710                 :            :                 return ICE_ERR_NO_MEMORY;
    3711                 :            : 
    3712                 :            :         /* Get the current PHY config */
    3713                 :          0 :         status = ice_aq_get_phy_caps(pi, false, ICE_AQC_REPORT_ACTIVE_CFG,
    3714                 :            :                                      pcaps, NULL);
    3715                 :            : 
    3716         [ #  # ]:          0 :         if (status) {
    3717                 :          0 :                 *aq_failures = ICE_SET_FC_AQ_FAIL_GET;
    3718                 :          0 :                 goto out;
    3719                 :            :         }
    3720                 :            : 
    3721                 :          0 :         ice_copy_phy_caps_to_cfg(pi, pcaps, &cfg);
    3722                 :            : 
    3723                 :            :         /* Configure the set PHY data */
    3724                 :          0 :         status = ice_cfg_phy_fc(pi, &cfg, pi->fc.req_mode);
    3725         [ #  # ]:          0 :         if (status) {
    3726         [ #  # ]:          0 :                 if (status != ICE_ERR_BAD_PTR)
    3727                 :          0 :                         *aq_failures = ICE_SET_FC_AQ_FAIL_GET;
    3728                 :            : 
    3729                 :          0 :                 goto out;
    3730                 :            :         }
    3731                 :            : 
    3732                 :            :         /* If the capabilities have changed, then set the new config */
    3733         [ #  # ]:          0 :         if (cfg.caps != pcaps->caps) {
    3734                 :            :                 int retry_count, retry_max = 10;
    3735                 :            : 
    3736                 :            :                 /* Auto restart link so settings take effect */
    3737         [ #  # ]:          0 :                 if (ena_auto_link_update)
    3738                 :          0 :                         cfg.caps |= ICE_AQ_PHY_ENA_AUTO_LINK_UPDT;
    3739                 :            : 
    3740                 :          0 :                 status = ice_aq_set_phy_cfg(hw, pi, &cfg, NULL);
    3741         [ #  # ]:          0 :                 if (status) {
    3742                 :          0 :                         *aq_failures = ICE_SET_FC_AQ_FAIL_SET;
    3743                 :          0 :                         goto out;
    3744                 :            :                 }
    3745                 :            : 
    3746                 :            :                 /* Update the link info
    3747                 :            :                  * It sometimes takes a really long time for link to
    3748                 :            :                  * come back from the atomic reset. Thus, we wait a
    3749                 :            :                  * little bit.
    3750                 :            :                  */
    3751         [ #  # ]:          0 :                 for (retry_count = 0; retry_count < retry_max; retry_count++) {
    3752                 :          0 :                         status = ice_update_link_info(pi);
    3753                 :            : 
    3754         [ #  # ]:          0 :                         if (status == ICE_SUCCESS)
    3755                 :            :                                 break;
    3756                 :            : 
    3757                 :          0 :                         ice_msec_delay(100, true);
    3758                 :            :                 }
    3759                 :            : 
    3760         [ #  # ]:          0 :                 if (status)
    3761                 :          0 :                         *aq_failures = ICE_SET_FC_AQ_FAIL_UPDATE;
    3762                 :            :         }
    3763                 :            : 
    3764                 :          0 : out:
    3765                 :          0 :         ice_free(hw, pcaps);
    3766                 :          0 :         return status;
    3767                 :            : }
    3768                 :            : 
    3769                 :            : /**
    3770                 :            :  * ice_phy_caps_equals_cfg
    3771                 :            :  * @phy_caps: PHY capabilities
    3772                 :            :  * @phy_cfg: PHY configuration
    3773                 :            :  *
    3774                 :            :  * Helper function to determine if PHY capabilities matches PHY
    3775                 :            :  * configuration
    3776                 :            :  */
    3777                 :            : bool
    3778                 :          0 : ice_phy_caps_equals_cfg(struct ice_aqc_get_phy_caps_data *phy_caps,
    3779                 :            :                         struct ice_aqc_set_phy_cfg_data *phy_cfg)
    3780                 :            : {
    3781                 :            :         u8 caps_mask, cfg_mask;
    3782                 :            : 
    3783         [ #  # ]:          0 :         if (!phy_caps || !phy_cfg)
    3784                 :            :                 return false;
    3785                 :            : 
    3786                 :            :         /* These bits are not common between capabilities and configuration.
    3787                 :            :          * Do not use them to determine equality.
    3788                 :            :          */
    3789                 :            :         caps_mask = ICE_AQC_PHY_CAPS_MASK & ~(ICE_AQC_PHY_AN_MODE |
    3790                 :            :                                               ICE_AQC_PHY_EN_MOD_QUAL);
    3791                 :            :         cfg_mask = ICE_AQ_PHY_ENA_VALID_MASK & ~ICE_AQ_PHY_ENA_AUTO_LINK_UPDT;
    3792                 :            : 
    3793         [ #  # ]:          0 :         if (phy_caps->phy_type_low != phy_cfg->phy_type_low ||
    3794         [ #  # ]:          0 :             phy_caps->phy_type_high != phy_cfg->phy_type_high ||
    3795         [ #  # ]:          0 :             ((phy_caps->caps & caps_mask) != (phy_cfg->caps & cfg_mask)) ||
    3796         [ #  # ]:          0 :             phy_caps->low_power_ctrl_an != phy_cfg->low_power_ctrl_an ||
    3797                 :          0 :             phy_caps->eee_cap != phy_cfg->eee_cap ||
    3798         [ #  # ]:          0 :             phy_caps->eeer_value != phy_cfg->eeer_value ||
    3799         [ #  # ]:          0 :             phy_caps->link_fec_options != phy_cfg->link_fec_opt)
    3800                 :          0 :                 return false;
    3801                 :            : 
    3802                 :            :         return true;
    3803                 :            : }
    3804                 :            : 
    3805                 :            : /**
    3806                 :            :  * ice_copy_phy_caps_to_cfg - Copy PHY ability data to configuration data
    3807                 :            :  * @pi: port information structure
    3808                 :            :  * @caps: PHY ability structure to copy data from
    3809                 :            :  * @cfg: PHY configuration structure to copy data to
    3810                 :            :  *
    3811                 :            :  * Helper function to copy AQC PHY get ability data to PHY set configuration
    3812                 :            :  * data structure
    3813                 :            :  */
    3814                 :            : void
    3815                 :          0 : ice_copy_phy_caps_to_cfg(struct ice_port_info *pi,
    3816                 :            :                          struct ice_aqc_get_phy_caps_data *caps,
    3817                 :            :                          struct ice_aqc_set_phy_cfg_data *cfg)
    3818                 :            : {
    3819   [ #  #  #  # ]:          0 :         if (!pi || !caps || !cfg)
    3820                 :            :                 return;
    3821                 :            : 
    3822                 :            :         ice_memset(cfg, 0, sizeof(*cfg), ICE_NONDMA_MEM);
    3823                 :          0 :         cfg->phy_type_low = caps->phy_type_low;
    3824                 :          0 :         cfg->phy_type_high = caps->phy_type_high;
    3825                 :          0 :         cfg->caps = caps->caps;
    3826                 :          0 :         cfg->low_power_ctrl_an = caps->low_power_ctrl_an;
    3827                 :          0 :         cfg->eee_cap = caps->eee_cap;
    3828                 :          0 :         cfg->eeer_value = caps->eeer_value;
    3829                 :          0 :         cfg->link_fec_opt = caps->link_fec_options;
    3830                 :          0 :         cfg->module_compliance_enforcement =
    3831                 :          0 :                 caps->module_compliance_enforcement;
    3832                 :            : }
    3833                 :            : 
    3834                 :            : /**
    3835                 :            :  * ice_cfg_phy_fec - Configure PHY FEC data based on FEC mode
    3836                 :            :  * @pi: port information structure
    3837                 :            :  * @cfg: PHY configuration data to set FEC mode
    3838                 :            :  * @fec: FEC mode to configure
    3839                 :            :  */
    3840                 :            : enum ice_status
    3841                 :          0 : ice_cfg_phy_fec(struct ice_port_info *pi, struct ice_aqc_set_phy_cfg_data *cfg,
    3842                 :            :                 enum ice_fec_mode fec)
    3843                 :            : {
    3844                 :            :         struct ice_aqc_get_phy_caps_data *pcaps;
    3845                 :            :         enum ice_status status = ICE_SUCCESS;
    3846                 :            :         struct ice_hw *hw;
    3847                 :            : 
    3848         [ #  # ]:          0 :         if (!pi || !cfg)
    3849                 :            :                 return ICE_ERR_BAD_PTR;
    3850                 :            : 
    3851                 :          0 :         hw = pi->hw;
    3852                 :            : 
    3853                 :            :         pcaps = (struct ice_aqc_get_phy_caps_data *)
    3854                 :          0 :                 ice_malloc(hw, sizeof(*pcaps));
    3855         [ #  # ]:          0 :         if (!pcaps)
    3856                 :            :                 return ICE_ERR_NO_MEMORY;
    3857                 :            : 
    3858         [ #  # ]:          0 :         status = ice_aq_get_phy_caps(pi, false,
    3859                 :          0 :                                      (ice_fw_supports_report_dflt_cfg(hw) ?
    3860                 :            :                                       ICE_AQC_REPORT_DFLT_CFG :
    3861                 :            :                                       ICE_AQC_REPORT_TOPO_CAP_MEDIA), pcaps, NULL);
    3862                 :            : 
    3863         [ #  # ]:          0 :         if (status)
    3864                 :          0 :                 goto out;
    3865                 :            : 
    3866                 :          0 :         cfg->caps |= (pcaps->caps & ICE_AQC_PHY_EN_AUTO_FEC);
    3867                 :          0 :         cfg->link_fec_opt = pcaps->link_fec_options;
    3868                 :            : 
    3869   [ #  #  #  #  :          0 :         switch (fec) {
                   #  # ]
    3870                 :          0 :         case ICE_FEC_BASER:
    3871                 :            :                 /* Clear RS bits, and AND BASE-R ability
    3872                 :            :                  * bits and OR request bits.
    3873                 :            :                  */
    3874                 :          0 :                 cfg->link_fec_opt &= ICE_AQC_PHY_FEC_10G_KR_40G_KR4_EN |
    3875                 :            :                         ICE_AQC_PHY_FEC_25G_KR_CLAUSE74_EN;
    3876                 :          0 :                 cfg->link_fec_opt |= ICE_AQC_PHY_FEC_10G_KR_40G_KR4_REQ |
    3877                 :            :                         ICE_AQC_PHY_FEC_25G_KR_REQ;
    3878                 :          0 :                 break;
    3879                 :          0 :         case ICE_FEC_RS:
    3880                 :            :                 /* Clear BASE-R bits, and AND RS ability
    3881                 :            :                  * bits and OR request bits.
    3882                 :            :                  */
    3883                 :          0 :                 cfg->link_fec_opt &= ICE_AQC_PHY_FEC_25G_RS_CLAUSE91_EN;
    3884                 :          0 :                 cfg->link_fec_opt |= ICE_AQC_PHY_FEC_25G_RS_528_REQ |
    3885                 :            :                         ICE_AQC_PHY_FEC_25G_RS_544_REQ;
    3886                 :          0 :                 break;
    3887                 :          0 :         case ICE_FEC_NONE:
    3888                 :            :                 /* Clear all FEC option bits. */
    3889                 :          0 :                 cfg->link_fec_opt &= ~ICE_AQC_PHY_FEC_MASK;
    3890                 :          0 :                 break;
    3891                 :          0 :         case ICE_FEC_DIS_AUTO:
    3892                 :            :                 /* Set No FEC and auto FEC */
    3893         [ #  # ]:          0 :                 if (!ice_fw_supports_fec_dis_auto(hw))
    3894                 :            :                         return ICE_ERR_NOT_SUPPORTED;
    3895                 :          0 :                 cfg->link_fec_opt |= ICE_AQC_PHY_FEC_DIS;
    3896                 :            :                 /* fall-through */
    3897                 :          0 :         case ICE_FEC_AUTO:
    3898                 :            :                 /* AND auto FEC bit, and all caps bits. */
    3899                 :            :                 cfg->caps &= ICE_AQC_PHY_CAPS_MASK;
    3900                 :          0 :                 cfg->link_fec_opt |= pcaps->link_fec_options;
    3901                 :          0 :                 break;
    3902                 :            :         default:
    3903                 :            :                 status = ICE_ERR_PARAM;
    3904                 :            :                 break;
    3905                 :            :         }
    3906                 :            : 
    3907   [ #  #  #  #  :          0 :         if (fec == ICE_FEC_AUTO && ice_fw_supports_link_override(pi->hw) &&
                   #  # ]
    3908                 :          0 :             !ice_fw_supports_report_dflt_cfg(pi->hw)) {
    3909                 :            :                 struct ice_link_default_override_tlv tlv;
    3910                 :            : 
    3911         [ #  # ]:          0 :                 if (ice_get_link_default_override(&tlv, pi))
    3912                 :          0 :                         goto out;
    3913                 :            : 
    3914         [ #  # ]:          0 :                 if (!(tlv.options & ICE_LINK_OVERRIDE_STRICT_MODE) &&
    3915                 :            :                     (tlv.options & ICE_LINK_OVERRIDE_EN))
    3916                 :          0 :                         cfg->link_fec_opt = tlv.fec_options;
    3917                 :            :         }
    3918                 :            : 
    3919                 :          0 : out:
    3920                 :          0 :         ice_free(hw, pcaps);
    3921                 :            : 
    3922                 :          0 :         return status;
    3923                 :            : }
    3924                 :            : 
    3925                 :            : /**
    3926                 :            :  * ice_get_link_status - get status of the HW network link
    3927                 :            :  * @pi: port information structure
    3928                 :            :  * @link_up: pointer to bool (true/false = linkup/linkdown)
    3929                 :            :  *
    3930                 :            :  * Variable link_up is true if link is up, false if link is down.
    3931                 :            :  * The variable link_up is invalid if status is non zero. As a
    3932                 :            :  * result of this call, link status reporting becomes enabled
    3933                 :            :  */
    3934                 :          0 : enum ice_status ice_get_link_status(struct ice_port_info *pi, bool *link_up)
    3935                 :            : {
    3936                 :            :         struct ice_phy_info *phy_info;
    3937                 :            :         enum ice_status status = ICE_SUCCESS;
    3938                 :            : 
    3939         [ #  # ]:          0 :         if (!pi || !link_up)
    3940                 :            :                 return ICE_ERR_PARAM;
    3941                 :            : 
    3942                 :            :         phy_info = &pi->phy;
    3943                 :            : 
    3944         [ #  # ]:          0 :         if (phy_info->get_link_info) {
    3945                 :          0 :                 status = ice_update_link_info(pi);
    3946                 :            : 
    3947         [ #  # ]:          0 :                 if (status)
    3948         [ #  # ]:          0 :                         ice_debug(pi->hw, ICE_DBG_LINK, "get link status error, status = %d\n",
    3949                 :            :                                   status);
    3950                 :            :         }
    3951                 :            : 
    3952                 :          0 :         *link_up = phy_info->link_info.link_info & ICE_AQ_LINK_UP;
    3953                 :            : 
    3954                 :          0 :         return status;
    3955                 :            : }
    3956                 :            : 
    3957                 :            : /**
    3958                 :            :  * ice_aq_set_link_restart_an
    3959                 :            :  * @pi: pointer to the port information structure
    3960                 :            :  * @ena_link: if true: enable link, if false: disable link
    3961                 :            :  * @cd: pointer to command details structure or NULL
    3962                 :            :  *
    3963                 :            :  * Sets up the link and restarts the Auto-Negotiation over the link.
    3964                 :            :  */
    3965                 :            : enum ice_status
    3966                 :          0 : ice_aq_set_link_restart_an(struct ice_port_info *pi, bool ena_link,
    3967                 :            :                            struct ice_sq_cd *cd)
    3968                 :            : {
    3969                 :            :         struct ice_aqc_restart_an *cmd;
    3970                 :            :         struct ice_aq_desc desc;
    3971                 :            : 
    3972                 :            :         cmd = &desc.params.restart_an;
    3973                 :            : 
    3974                 :          0 :         ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_restart_an);
    3975                 :            : 
    3976                 :          0 :         cmd->cmd_flags = ICE_AQC_RESTART_AN_LINK_RESTART;
    3977                 :          0 :         cmd->lport_num = pi->lport;
    3978         [ #  # ]:          0 :         if (ena_link)
    3979                 :          0 :                 cmd->cmd_flags |= ICE_AQC_RESTART_AN_LINK_ENABLE;
    3980                 :            :         else
    3981                 :            :                 cmd->cmd_flags &= ~ICE_AQC_RESTART_AN_LINK_ENABLE;
    3982                 :            : 
    3983                 :          0 :         return ice_aq_send_cmd(pi->hw, &desc, NULL, 0, cd);
    3984                 :            : }
    3985                 :            : 
    3986                 :            : /**
    3987                 :            :  * ice_aq_set_event_mask
    3988                 :            :  * @hw: pointer to the HW struct
    3989                 :            :  * @port_num: port number of the physical function
    3990                 :            :  * @mask: event mask to be set
    3991                 :            :  * @cd: pointer to command details structure or NULL
    3992                 :            :  *
    3993                 :            :  * Set event mask (0x0613)
    3994                 :            :  */
    3995                 :            : enum ice_status
    3996                 :          0 : ice_aq_set_event_mask(struct ice_hw *hw, u8 port_num, u16 mask,
    3997                 :            :                       struct ice_sq_cd *cd)
    3998                 :            : {
    3999                 :            :         struct ice_aqc_set_event_mask *cmd;
    4000                 :            :         struct ice_aq_desc desc;
    4001                 :            : 
    4002                 :            :         cmd = &desc.params.set_event_mask;
    4003                 :            : 
    4004                 :          0 :         ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_set_event_mask);
    4005                 :            : 
    4006                 :          0 :         cmd->lport_num = port_num;
    4007                 :            : 
    4008                 :          0 :         cmd->event_mask = CPU_TO_LE16(mask);
    4009                 :          0 :         return ice_aq_send_cmd(hw, &desc, NULL, 0, cd);
    4010                 :            : }
    4011                 :            : 
    4012                 :            : /**
    4013                 :            :  * ice_aq_set_mac_loopback
    4014                 :            :  * @hw: pointer to the HW struct
    4015                 :            :  * @ena_lpbk: Enable or Disable loopback
    4016                 :            :  * @cd: pointer to command details structure or NULL
    4017                 :            :  *
    4018                 :            :  * Enable/disable loopback on a given port
    4019                 :            :  */
    4020                 :            : enum ice_status
    4021                 :          0 : ice_aq_set_mac_loopback(struct ice_hw *hw, bool ena_lpbk, struct ice_sq_cd *cd)
    4022                 :            : {
    4023                 :            :         struct ice_aqc_set_mac_lb *cmd;
    4024                 :            :         struct ice_aq_desc desc;
    4025                 :            : 
    4026                 :            :         cmd = &desc.params.set_mac_lb;
    4027                 :            : 
    4028                 :          0 :         ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_set_mac_lb);
    4029         [ #  # ]:          0 :         if (ena_lpbk)
    4030                 :          0 :                 cmd->lb_mode = ICE_AQ_MAC_LB_EN;
    4031                 :            : 
    4032                 :          0 :         return ice_aq_send_cmd(hw, &desc, NULL, 0, cd);
    4033                 :            : }
    4034                 :            : 
    4035                 :            : /**
    4036                 :            :  * ice_aq_set_port_id_led
    4037                 :            :  * @pi: pointer to the port information
    4038                 :            :  * @is_orig_mode: is this LED set to original mode (by the net-list)
    4039                 :            :  * @cd: pointer to command details structure or NULL
    4040                 :            :  *
    4041                 :            :  * Set LED value for the given port (0x06e9)
    4042                 :            :  */
    4043                 :            : enum ice_status
    4044                 :          0 : ice_aq_set_port_id_led(struct ice_port_info *pi, bool is_orig_mode,
    4045                 :            :                        struct ice_sq_cd *cd)
    4046                 :            : {
    4047                 :            :         struct ice_aqc_set_port_id_led *cmd;
    4048                 :          0 :         struct ice_hw *hw = pi->hw;
    4049                 :            :         struct ice_aq_desc desc;
    4050                 :            : 
    4051                 :            :         cmd = &desc.params.set_port_id_led;
    4052                 :            : 
    4053                 :          0 :         ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_set_port_id_led);
    4054                 :            : 
    4055         [ #  # ]:          0 :         if (is_orig_mode)
    4056                 :          0 :                 cmd->ident_mode = ICE_AQC_PORT_IDENT_LED_ORIG;
    4057                 :            :         else
    4058                 :          0 :                 cmd->ident_mode = ICE_AQC_PORT_IDENT_LED_BLINK;
    4059                 :            : 
    4060                 :          0 :         return ice_aq_send_cmd(hw, &desc, NULL, 0, cd);
    4061                 :            : }
    4062                 :            : 
    4063                 :            : /**
    4064                 :            :  * ice_aq_sff_eeprom
    4065                 :            :  * @hw: pointer to the HW struct
    4066                 :            :  * @lport: bits [7:0] = logical port, bit [8] = logical port valid
    4067                 :            :  * @bus_addr: I2C bus address of the eeprom (typically 0xA0, 0=topo default)
    4068                 :            :  * @mem_addr: I2C offset. lower 8 bits for address, 8 upper bits zero padding.
    4069                 :            :  * @page: QSFP page
    4070                 :            :  * @set_page: set or ignore the page
    4071                 :            :  * @data: pointer to data buffer to be read/written to the I2C device.
    4072                 :            :  * @length: 1-16 for read, 1 for write.
    4073                 :            :  * @write: 0 read, 1 for write.
    4074                 :            :  * @cd: pointer to command details structure or NULL
    4075                 :            :  *
    4076                 :            :  * Read/Write SFF EEPROM (0x06EE)
    4077                 :            :  */
    4078                 :            : enum ice_status
    4079                 :          0 : ice_aq_sff_eeprom(struct ice_hw *hw, u16 lport, u8 bus_addr,
    4080                 :            :                   u16 mem_addr, u8 page, u8 set_page, u8 *data, u8 length,
    4081                 :            :                   bool write, struct ice_sq_cd *cd)
    4082                 :            : {
    4083                 :            :         struct ice_aqc_sff_eeprom *cmd;
    4084                 :            :         struct ice_aq_desc desc;
    4085                 :            :         enum ice_status status;
    4086                 :            : 
    4087   [ #  #  #  # ]:          0 :         if (!data || (mem_addr & 0xff00))
    4088                 :            :                 return ICE_ERR_PARAM;
    4089                 :            : 
    4090                 :          0 :         ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_sff_eeprom);
    4091                 :            :         cmd = &desc.params.read_write_sff_param;
    4092                 :          0 :         desc.flags = CPU_TO_LE16(ICE_AQ_FLAG_RD);
    4093                 :          0 :         cmd->lport_num = (u8)(lport & 0xff);
    4094                 :          0 :         cmd->lport_num_valid = (u8)((lport >> 8) & 0x01);
    4095                 :          0 :         cmd->i2c_bus_addr = CPU_TO_LE16(((bus_addr >> 1) &
    4096                 :            :                                          ICE_AQC_SFF_I2CBUS_7BIT_M) |
    4097                 :            :                                         ((set_page <<
    4098                 :            :                                           ICE_AQC_SFF_SET_EEPROM_PAGE_S) &
    4099                 :            :                                          ICE_AQC_SFF_SET_EEPROM_PAGE_M));
    4100                 :          0 :         cmd->i2c_mem_addr = CPU_TO_LE16(mem_addr & 0xff);
    4101                 :          0 :         cmd->eeprom_page = CPU_TO_LE16((u16)page << ICE_AQC_SFF_EEPROM_PAGE_S);
    4102         [ #  # ]:          0 :         if (write)
    4103                 :          0 :                 cmd->i2c_bus_addr |= CPU_TO_LE16(ICE_AQC_SFF_IS_WRITE);
    4104                 :            : 
    4105                 :          0 :         status = ice_aq_send_cmd(hw, &desc, data, length, cd);
    4106                 :          0 :         return status;
    4107                 :            : }
    4108                 :            : 
    4109                 :            : /**
    4110                 :            :  * ice_aq_prog_topo_dev_nvm
    4111                 :            :  * @hw: pointer to the hardware structure
    4112                 :            :  * @topo_params: pointer to structure storing topology parameters for a device
    4113                 :            :  * @cd: pointer to command details structure or NULL
    4114                 :            :  *
    4115                 :            :  * Program Topology Device NVM (0x06F2)
    4116                 :            :  *
    4117                 :            :  */
    4118                 :            : enum ice_status
    4119                 :          0 : ice_aq_prog_topo_dev_nvm(struct ice_hw *hw,
    4120                 :            :                          struct ice_aqc_link_topo_params *topo_params,
    4121                 :            :                          struct ice_sq_cd *cd)
    4122                 :            : {
    4123                 :            :         struct ice_aqc_prog_topo_dev_nvm *cmd;
    4124                 :            :         struct ice_aq_desc desc;
    4125                 :            : 
    4126                 :            :         cmd = &desc.params.prog_topo_dev_nvm;
    4127                 :            : 
    4128                 :          0 :         ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_prog_topo_dev_nvm);
    4129                 :            : 
    4130                 :            :         ice_memcpy(&cmd->topo_params, topo_params, sizeof(*topo_params),
    4131                 :            :                    ICE_NONDMA_TO_NONDMA);
    4132                 :            : 
    4133                 :          0 :         return ice_aq_send_cmd(hw, &desc, NULL, 0, cd);
    4134                 :            : }
    4135                 :            : 
    4136                 :            : /**
    4137                 :            :  * ice_aq_read_topo_dev_nvm
    4138                 :            :  * @hw: pointer to the hardware structure
    4139                 :            :  * @topo_params: pointer to structure storing topology parameters for a device
    4140                 :            :  * @start_address: byte offset in the topology device NVM
    4141                 :            :  * @data: pointer to data buffer
    4142                 :            :  * @data_size: number of bytes to be read from the topology device NVM
    4143                 :            :  * @cd: pointer to command details structure or NULL
    4144                 :            :  * Read Topology Device NVM (0x06F3)
    4145                 :            :  *
    4146                 :            :  */
    4147                 :            : enum ice_status
    4148                 :          0 : ice_aq_read_topo_dev_nvm(struct ice_hw *hw,
    4149                 :            :                          struct ice_aqc_link_topo_params *topo_params,
    4150                 :            :                          u32 start_address, u8 *data, u8 data_size,
    4151                 :            :                          struct ice_sq_cd *cd)
    4152                 :            : {
    4153                 :            :         struct ice_aqc_read_topo_dev_nvm *cmd;
    4154                 :            :         struct ice_aq_desc desc;
    4155                 :            :         enum ice_status status;
    4156                 :            : 
    4157   [ #  #  #  # ]:          0 :         if (!data || data_size == 0 ||
    4158                 :            :             data_size > ICE_AQC_READ_TOPO_DEV_NVM_DATA_READ_SIZE)
    4159                 :            :                 return ICE_ERR_PARAM;
    4160                 :            : 
    4161                 :            :         cmd = &desc.params.read_topo_dev_nvm;
    4162                 :            : 
    4163                 :          0 :         ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_read_topo_dev_nvm);
    4164                 :            : 
    4165         [ #  # ]:          0 :         desc.datalen = CPU_TO_LE16(data_size);
    4166                 :            :         ice_memcpy(&cmd->topo_params, topo_params, sizeof(*topo_params),
    4167                 :            :                    ICE_NONDMA_TO_NONDMA);
    4168                 :          0 :         cmd->start_address = CPU_TO_LE32(start_address);
    4169                 :            : 
    4170                 :          0 :         status = ice_aq_send_cmd(hw, &desc, NULL, 0, cd);
    4171         [ #  # ]:          0 :         if (status)
    4172                 :            :                 return status;
    4173                 :            : 
    4174                 :            :         ice_memcpy(data, cmd->data_read, data_size, ICE_NONDMA_TO_NONDMA);
    4175                 :            : 
    4176                 :            :         return ICE_SUCCESS;
    4177                 :            : }
    4178                 :            : 
    4179                 :            : /**
    4180                 :            :  * __ice_aq_get_set_rss_lut
    4181                 :            :  * @hw: pointer to the hardware structure
    4182                 :            :  * @params: RSS LUT parameters
    4183                 :            :  * @set: set true to set the table, false to get the table
    4184                 :            :  *
    4185                 :            :  * Internal function to get (0x0B05) or set (0x0B03) RSS look up table
    4186                 :            :  */
    4187                 :            : static enum ice_status
    4188                 :          0 : __ice_aq_get_set_rss_lut(struct ice_hw *hw, struct ice_aq_get_set_rss_lut_params *params, bool set)
    4189                 :            : {
    4190                 :            :         u16 flags = 0, vsi_id, lut_type, lut_size, glob_lut_idx, vsi_handle;
    4191                 :            :         struct ice_aqc_get_set_rss_lut *cmd_resp;
    4192                 :            :         struct ice_aq_desc desc;
    4193                 :            :         enum ice_status status;
    4194                 :            :         u8 *lut;
    4195                 :            : 
    4196         [ #  # ]:          0 :         if (!params)
    4197                 :            :                 return ICE_ERR_PARAM;
    4198                 :            : 
    4199                 :          0 :         vsi_handle = params->vsi_handle;
    4200                 :          0 :         lut = params->lut;
    4201                 :            : 
    4202   [ #  #  #  # ]:          0 :         if (!ice_is_vsi_valid(hw, vsi_handle) || !lut)
    4203                 :            :                 return ICE_ERR_PARAM;
    4204                 :            : 
    4205                 :          0 :         lut_size = params->lut_size;
    4206                 :          0 :         lut_type = params->lut_type;
    4207                 :          0 :         glob_lut_idx = params->global_lut_id;
    4208                 :          0 :         vsi_id = ice_get_hw_vsi_num(hw, vsi_handle);
    4209                 :            : 
    4210                 :            :         cmd_resp = &desc.params.get_set_rss_lut;
    4211                 :            : 
    4212         [ #  # ]:          0 :         if (set) {
    4213                 :          0 :                 ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_set_rss_lut);
    4214                 :          0 :                 desc.flags |= CPU_TO_LE16(ICE_AQ_FLAG_RD);
    4215                 :            :         } else {
    4216                 :          0 :                 ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_get_rss_lut);
    4217                 :            :         }
    4218                 :            : 
    4219                 :          0 :         cmd_resp->vsi_id = CPU_TO_LE16(((vsi_id <<
    4220                 :            :                                          ICE_AQC_GSET_RSS_LUT_VSI_ID_S) &
    4221                 :            :                                         ICE_AQC_GSET_RSS_LUT_VSI_ID_M) |
    4222                 :            :                                        ICE_AQC_GSET_RSS_LUT_VSI_VALID);
    4223                 :            : 
    4224         [ #  # ]:          0 :         switch (lut_type) {
    4225                 :          0 :         case ICE_AQC_GSET_RSS_LUT_TABLE_TYPE_VSI:
    4226                 :            :         case ICE_AQC_GSET_RSS_LUT_TABLE_TYPE_PF:
    4227                 :            :         case ICE_AQC_GSET_RSS_LUT_TABLE_TYPE_GLOBAL:
    4228                 :          0 :                 flags |= ((lut_type << ICE_AQC_GSET_RSS_LUT_TABLE_TYPE_S) &
    4229                 :            :                           ICE_AQC_GSET_RSS_LUT_TABLE_TYPE_M);
    4230                 :            :                 break;
    4231                 :          0 :         default:
    4232                 :            :                 status = ICE_ERR_PARAM;
    4233                 :          0 :                 goto ice_aq_get_set_rss_lut_exit;
    4234                 :            :         }
    4235                 :            : 
    4236         [ #  # ]:          0 :         if (lut_type == ICE_AQC_GSET_RSS_LUT_TABLE_TYPE_GLOBAL) {
    4237                 :          0 :                 flags |= ((glob_lut_idx << ICE_AQC_GSET_RSS_LUT_GLOBAL_IDX_S) &
    4238                 :            :                           ICE_AQC_GSET_RSS_LUT_GLOBAL_IDX_M);
    4239                 :            : 
    4240         [ #  # ]:          0 :                 if (!set)
    4241                 :          0 :                         goto ice_aq_get_set_rss_lut_send;
    4242         [ #  # ]:          0 :         } else if (lut_type == ICE_AQC_GSET_RSS_LUT_TABLE_TYPE_PF) {
    4243         [ #  # ]:          0 :                 if (!set)
    4244                 :          0 :                         goto ice_aq_get_set_rss_lut_send;
    4245                 :            :         } else {
    4246                 :          0 :                 goto ice_aq_get_set_rss_lut_send;
    4247                 :            :         }
    4248                 :            : 
    4249                 :            :         /* LUT size is only valid for Global and PF table types */
    4250   [ #  #  #  # ]:          0 :         switch (lut_size) {
    4251                 :            :         case ICE_AQC_GSET_RSS_LUT_TABLE_SIZE_128:
    4252                 :            :                 flags |= (ICE_AQC_GSET_RSS_LUT_TABLE_SIZE_128_FLAG <<
    4253                 :            :                           ICE_AQC_GSET_RSS_LUT_TABLE_SIZE_S) &
    4254                 :            :                          ICE_AQC_GSET_RSS_LUT_TABLE_SIZE_M;
    4255                 :            :                 break;
    4256                 :          0 :         case ICE_AQC_GSET_RSS_LUT_TABLE_SIZE_512:
    4257                 :          0 :                 flags |= (ICE_AQC_GSET_RSS_LUT_TABLE_SIZE_512_FLAG <<
    4258                 :            :                           ICE_AQC_GSET_RSS_LUT_TABLE_SIZE_S) &
    4259                 :            :                          ICE_AQC_GSET_RSS_LUT_TABLE_SIZE_M;
    4260                 :          0 :                 break;
    4261                 :          0 :         case ICE_AQC_GSET_RSS_LUT_TABLE_SIZE_2K:
    4262         [ #  # ]:          0 :                 if (lut_type == ICE_AQC_GSET_RSS_LUT_TABLE_TYPE_PF) {
    4263                 :          0 :                         flags |= (ICE_AQC_GSET_RSS_LUT_TABLE_SIZE_2K_FLAG <<
    4264                 :            :                                   ICE_AQC_GSET_RSS_LUT_TABLE_SIZE_S) &
    4265                 :            :                                  ICE_AQC_GSET_RSS_LUT_TABLE_SIZE_M;
    4266                 :          0 :                         break;
    4267                 :            :                 }
    4268                 :            :                 /* fall-through */
    4269                 :            :         default:
    4270                 :            :                 status = ICE_ERR_PARAM;
    4271                 :          0 :                 goto ice_aq_get_set_rss_lut_exit;
    4272                 :            :         }
    4273                 :            : 
    4274                 :          0 : ice_aq_get_set_rss_lut_send:
    4275                 :          0 :         cmd_resp->flags = CPU_TO_LE16(flags);
    4276                 :          0 :         status = ice_aq_send_cmd(hw, &desc, lut, lut_size, NULL);
    4277                 :            : 
    4278                 :            : ice_aq_get_set_rss_lut_exit:
    4279                 :            :         return status;
    4280                 :            : }
    4281                 :            : 
    4282                 :            : /**
    4283                 :            :  * ice_aq_get_rss_lut
    4284                 :            :  * @hw: pointer to the hardware structure
    4285                 :            :  * @get_params: RSS LUT parameters used to specify which RSS LUT to get
    4286                 :            :  *
    4287                 :            :  * get the RSS lookup table, PF or VSI type
    4288                 :            :  */
    4289                 :            : enum ice_status
    4290                 :          0 : ice_aq_get_rss_lut(struct ice_hw *hw, struct ice_aq_get_set_rss_lut_params *get_params)
    4291                 :            : {
    4292                 :          0 :         return __ice_aq_get_set_rss_lut(hw, get_params, false);
    4293                 :            : }
    4294                 :            : 
    4295                 :            : /**
    4296                 :            :  * ice_aq_set_rss_lut
    4297                 :            :  * @hw: pointer to the hardware structure
    4298                 :            :  * @set_params: RSS LUT parameters used to specify how to set the RSS LUT
    4299                 :            :  *
    4300                 :            :  * set the RSS lookup table, PF or VSI type
    4301                 :            :  */
    4302                 :            : enum ice_status
    4303                 :          0 : ice_aq_set_rss_lut(struct ice_hw *hw, struct ice_aq_get_set_rss_lut_params *set_params)
    4304                 :            : {
    4305                 :          0 :         return __ice_aq_get_set_rss_lut(hw, set_params, true);
    4306                 :            : }
    4307                 :            : 
    4308                 :            : /**
    4309                 :            :  * __ice_aq_get_set_rss_key
    4310                 :            :  * @hw: pointer to the HW struct
    4311                 :            :  * @vsi_id: VSI FW index
    4312                 :            :  * @key: pointer to key info struct
    4313                 :            :  * @set: set true to set the key, false to get the key
    4314                 :            :  *
    4315                 :            :  * get (0x0B04) or set (0x0B02) the RSS key per VSI
    4316                 :            :  */
    4317                 :            : static enum
    4318                 :          0 : ice_status __ice_aq_get_set_rss_key(struct ice_hw *hw, u16 vsi_id,
    4319                 :            :                                     struct ice_aqc_get_set_rss_keys *key,
    4320                 :            :                                     bool set)
    4321                 :            : {
    4322                 :            :         struct ice_aqc_get_set_rss_key *cmd_resp;
    4323                 :            :         u16 key_size = sizeof(*key);
    4324                 :            :         struct ice_aq_desc desc;
    4325                 :            : 
    4326                 :            :         cmd_resp = &desc.params.get_set_rss_key;
    4327                 :            : 
    4328         [ #  # ]:          0 :         if (set) {
    4329                 :          0 :                 ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_set_rss_key);
    4330                 :          0 :                 desc.flags |= CPU_TO_LE16(ICE_AQ_FLAG_RD);
    4331                 :            :         } else {
    4332                 :          0 :                 ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_get_rss_key);
    4333                 :            :         }
    4334                 :            : 
    4335                 :          0 :         cmd_resp->vsi_id = CPU_TO_LE16(((vsi_id <<
    4336                 :            :                                          ICE_AQC_GSET_RSS_KEY_VSI_ID_S) &
    4337                 :            :                                         ICE_AQC_GSET_RSS_KEY_VSI_ID_M) |
    4338                 :            :                                        ICE_AQC_GSET_RSS_KEY_VSI_VALID);
    4339                 :            : 
    4340                 :          0 :         return ice_aq_send_cmd(hw, &desc, key, key_size, NULL);
    4341                 :            : }
    4342                 :            : 
    4343                 :            : /**
    4344                 :            :  * ice_aq_get_rss_key
    4345                 :            :  * @hw: pointer to the HW struct
    4346                 :            :  * @vsi_handle: software VSI handle
    4347                 :            :  * @key: pointer to key info struct
    4348                 :            :  *
    4349                 :            :  * get the RSS key per VSI
    4350                 :            :  */
    4351                 :            : enum ice_status
    4352                 :          0 : ice_aq_get_rss_key(struct ice_hw *hw, u16 vsi_handle,
    4353                 :            :                    struct ice_aqc_get_set_rss_keys *key)
    4354                 :            : {
    4355   [ #  #  #  # ]:          0 :         if (!ice_is_vsi_valid(hw, vsi_handle) || !key)
    4356                 :            :                 return ICE_ERR_PARAM;
    4357                 :            : 
    4358                 :          0 :         return __ice_aq_get_set_rss_key(hw, ice_get_hw_vsi_num(hw, vsi_handle),
    4359                 :            :                                         key, false);
    4360                 :            : }
    4361                 :            : 
    4362                 :            : /**
    4363                 :            :  * ice_aq_set_rss_key
    4364                 :            :  * @hw: pointer to the HW struct
    4365                 :            :  * @vsi_handle: software VSI handle
    4366                 :            :  * @keys: pointer to key info struct
    4367                 :            :  *
    4368                 :            :  * set the RSS key per VSI
    4369                 :            :  */
    4370                 :            : enum ice_status
    4371                 :          0 : ice_aq_set_rss_key(struct ice_hw *hw, u16 vsi_handle,
    4372                 :            :                    struct ice_aqc_get_set_rss_keys *keys)
    4373                 :            : {
    4374   [ #  #  #  # ]:          0 :         if (!ice_is_vsi_valid(hw, vsi_handle) || !keys)
    4375                 :            :                 return ICE_ERR_PARAM;
    4376                 :            : 
    4377                 :          0 :         return __ice_aq_get_set_rss_key(hw, ice_get_hw_vsi_num(hw, vsi_handle),
    4378                 :            :                                         keys, true);
    4379                 :            : }
    4380                 :            : 
    4381                 :            : /**
    4382                 :            :  * ice_aq_add_lan_txq
    4383                 :            :  * @hw: pointer to the hardware structure
    4384                 :            :  * @num_qgrps: Number of added queue groups
    4385                 :            :  * @qg_list: list of queue groups to be added
    4386                 :            :  * @buf_size: size of buffer for indirect command
    4387                 :            :  * @cd: pointer to command details structure or NULL
    4388                 :            :  *
    4389                 :            :  * Add Tx LAN queue (0x0C30)
    4390                 :            :  *
    4391                 :            :  * NOTE:
    4392                 :            :  * Prior to calling add Tx LAN queue:
    4393                 :            :  * Initialize the following as part of the Tx queue context:
    4394                 :            :  * Completion queue ID if the queue uses Completion queue, Quanta profile,
    4395                 :            :  * Cache profile and Packet shaper profile.
    4396                 :            :  *
    4397                 :            :  * After add Tx LAN queue AQ command is completed:
    4398                 :            :  * Interrupts should be associated with specific queues,
    4399                 :            :  * Association of Tx queue to Doorbell queue is not part of Add LAN Tx queue
    4400                 :            :  * flow.
    4401                 :            :  */
    4402                 :            : enum ice_status
    4403                 :          0 : ice_aq_add_lan_txq(struct ice_hw *hw, u8 num_qgrps,
    4404                 :            :                    struct ice_aqc_add_tx_qgrp *qg_list, u16 buf_size,
    4405                 :            :                    struct ice_sq_cd *cd)
    4406                 :            : {
    4407                 :            :         struct ice_aqc_add_tx_qgrp *list;
    4408                 :            :         struct ice_aqc_add_txqs *cmd;
    4409                 :            :         struct ice_aq_desc desc;
    4410                 :            :         u16 i, sum_size = 0;
    4411                 :            : 
    4412         [ #  # ]:          0 :         ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);
    4413                 :            : 
    4414                 :            :         cmd = &desc.params.add_txqs;
    4415                 :            : 
    4416                 :          0 :         ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_add_txqs);
    4417                 :            : 
    4418         [ #  # ]:          0 :         if (!qg_list)
    4419                 :            :                 return ICE_ERR_PARAM;
    4420                 :            : 
    4421         [ #  # ]:          0 :         if (num_qgrps > ICE_LAN_TXQ_MAX_QGRPS)
    4422                 :            :                 return ICE_ERR_PARAM;
    4423                 :            : 
    4424         [ #  # ]:          0 :         for (i = 0, list = qg_list; i < num_qgrps; i++) {
    4425                 :          0 :                 sum_size += ice_struct_size(list, txqs, list->num_txqs);
    4426                 :          0 :                 list = (struct ice_aqc_add_tx_qgrp *)(list->txqs +
    4427                 :          0 :                                                       list->num_txqs);
    4428                 :            :         }
    4429                 :            : 
    4430         [ #  # ]:          0 :         if (buf_size != sum_size)
    4431                 :            :                 return ICE_ERR_PARAM;
    4432                 :            : 
    4433                 :          0 :         desc.flags |= CPU_TO_LE16(ICE_AQ_FLAG_RD);
    4434                 :            : 
    4435                 :          0 :         cmd->num_qgrps = num_qgrps;
    4436                 :            : 
    4437                 :          0 :         return ice_aq_send_cmd(hw, &desc, qg_list, buf_size, cd);
    4438                 :            : }
    4439                 :            : 
    4440                 :            : /**
    4441                 :            :  * ice_aq_dis_lan_txq
    4442                 :            :  * @hw: pointer to the hardware structure
    4443                 :            :  * @num_qgrps: number of groups in the list
    4444                 :            :  * @qg_list: the list of groups to disable
    4445                 :            :  * @buf_size: the total size of the qg_list buffer in bytes
    4446                 :            :  * @rst_src: if called due to reset, specifies the reset source
    4447                 :            :  * @vmvf_num: the relative VM or VF number that is undergoing the reset
    4448                 :            :  * @cd: pointer to command details structure or NULL
    4449                 :            :  *
    4450                 :            :  * Disable LAN Tx queue (0x0C31)
    4451                 :            :  */
    4452                 :            : static enum ice_status
    4453                 :          0 : ice_aq_dis_lan_txq(struct ice_hw *hw, u8 num_qgrps,
    4454                 :            :                    struct ice_aqc_dis_txq_item *qg_list, u16 buf_size,
    4455                 :            :                    enum ice_disq_rst_src rst_src, u16 vmvf_num,
    4456                 :            :                    struct ice_sq_cd *cd)
    4457                 :            : {
    4458                 :            :         struct ice_aqc_dis_txq_item *item;
    4459                 :            :         struct ice_aqc_dis_txqs *cmd;
    4460                 :            :         struct ice_aq_desc desc;
    4461                 :            :         enum ice_status status;
    4462                 :            :         u16 i, sz = 0;
    4463                 :            : 
    4464         [ #  # ]:          0 :         ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);
    4465                 :            :         cmd = &desc.params.dis_txqs;
    4466                 :          0 :         ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_dis_txqs);
    4467                 :            : 
    4468                 :            :         /* qg_list can be NULL only in VM/VF reset flow */
    4469         [ #  # ]:          0 :         if (!qg_list && !rst_src)
    4470                 :            :                 return ICE_ERR_PARAM;
    4471                 :            : 
    4472         [ #  # ]:          0 :         if (num_qgrps > ICE_LAN_TXQ_MAX_QGRPS)
    4473                 :            :                 return ICE_ERR_PARAM;
    4474                 :            : 
    4475                 :          0 :         cmd->num_entries = num_qgrps;
    4476                 :            : 
    4477                 :          0 :         cmd->vmvf_and_timeout = CPU_TO_LE16((5 << ICE_AQC_Q_DIS_TIMEOUT_S) &
    4478                 :            :                                             ICE_AQC_Q_DIS_TIMEOUT_M);
    4479                 :            : 
    4480         [ #  # ]:          0 :         switch (rst_src) {
    4481                 :          0 :         case ICE_VM_RESET:
    4482                 :          0 :                 cmd->cmd_type = ICE_AQC_Q_DIS_CMD_VM_RESET;
    4483                 :          0 :                 cmd->vmvf_and_timeout |=
    4484                 :          0 :                         CPU_TO_LE16(vmvf_num & ICE_AQC_Q_DIS_VMVF_NUM_M);
    4485                 :          0 :                 break;
    4486                 :            :         case ICE_NO_RESET:
    4487                 :            :         default:
    4488                 :            :                 break;
    4489                 :            :         }
    4490                 :            : 
    4491                 :            :         /* flush pipe on time out */
    4492                 :          0 :         cmd->cmd_type |= ICE_AQC_Q_DIS_CMD_FLUSH_PIPE;
    4493                 :            :         /* If no queue group info, we are in a reset flow. Issue the AQ */
    4494         [ #  # ]:          0 :         if (!qg_list)
    4495                 :          0 :                 goto do_aq;
    4496                 :            : 
    4497                 :            :         /* set RD bit to indicate that command buffer is provided by the driver
    4498                 :            :          * and it needs to be read by the firmware
    4499                 :            :          */
    4500                 :          0 :         desc.flags |= CPU_TO_LE16(ICE_AQ_FLAG_RD);
    4501                 :            : 
    4502         [ #  # ]:          0 :         for (i = 0, item = qg_list; i < num_qgrps; i++) {
    4503                 :          0 :                 u16 item_size = ice_struct_size(item, q_id, item->num_qs);
    4504                 :            : 
    4505                 :            :                 /* If the num of queues is even, add 2 bytes of padding */
    4506         [ #  # ]:          0 :                 if ((item->num_qs % 2) == 0)
    4507                 :          0 :                         item_size += 2;
    4508                 :            : 
    4509                 :          0 :                 sz += item_size;
    4510                 :            : 
    4511                 :          0 :                 item = (struct ice_aqc_dis_txq_item *)((u8 *)item + item_size);
    4512                 :            :         }
    4513                 :            : 
    4514         [ #  # ]:          0 :         if (buf_size != sz)
    4515                 :            :                 return ICE_ERR_PARAM;
    4516                 :            : 
    4517                 :          0 : do_aq:
    4518                 :          0 :         status = ice_aq_send_cmd(hw, &desc, qg_list, buf_size, cd);
    4519         [ #  # ]:          0 :         if (status) {
    4520         [ #  # ]:          0 :                 if (!qg_list)
    4521         [ #  # ]:          0 :                         ice_debug(hw, ICE_DBG_SCHED, "VM%d disable failed %d\n",
    4522                 :            :                                   vmvf_num, hw->adminq.sq_last_status);
    4523                 :            :                 else
    4524         [ #  # ]:          0 :                         ice_debug(hw, ICE_DBG_SCHED, "disable queue %d failed %d\n",
    4525                 :            :                                   LE16_TO_CPU(qg_list[0].q_id[0]),
    4526                 :            :                                   hw->adminq.sq_last_status);
    4527                 :            :         }
    4528                 :            :         return status;
    4529                 :            : }
    4530                 :            : 
    4531                 :            : /**
    4532                 :            :  * ice_aq_move_recfg_lan_txq
    4533                 :            :  * @hw: pointer to the hardware structure
    4534                 :            :  * @num_qs: number of queues to move/reconfigure
    4535                 :            :  * @is_move: true if this operation involves node movement
    4536                 :            :  * @is_tc_change: true if this operation involves a TC change
    4537                 :            :  * @subseq_call: true if this operation is a subsequent call
    4538                 :            :  * @flush_pipe: on timeout, true to flush pipe, false to return EAGAIN
    4539                 :            :  * @timeout: timeout in units of 100 usec (valid values 0-50)
    4540                 :            :  * @blocked_cgds: out param, bitmap of CGDs that timed out if returning EAGAIN
    4541                 :            :  * @buf: struct containing src/dest TEID and per-queue info
    4542                 :            :  * @buf_size: size of buffer for indirect command
    4543                 :            :  * @txqs_moved: out param, number of queues successfully moved
    4544                 :            :  * @cd: pointer to command details structure or NULL
    4545                 :            :  *
    4546                 :            :  * Move / Reconfigure Tx LAN queues (0x0C32)
    4547                 :            :  */
    4548                 :            : enum ice_status
    4549                 :          0 : ice_aq_move_recfg_lan_txq(struct ice_hw *hw, u8 num_qs, bool is_move,
    4550                 :            :                           bool is_tc_change, bool subseq_call, bool flush_pipe,
    4551                 :            :                           u8 timeout, u32 *blocked_cgds,
    4552                 :            :                           struct ice_aqc_move_txqs_data *buf, u16 buf_size,
    4553                 :            :                           u8 *txqs_moved, struct ice_sq_cd *cd)
    4554                 :            : {
    4555                 :            :         struct ice_aqc_move_txqs *cmd;
    4556                 :            :         struct ice_aq_desc desc;
    4557                 :            :         enum ice_status status;
    4558                 :            : 
    4559                 :            :         cmd = &desc.params.move_txqs;
    4560                 :          0 :         ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_move_recfg_txqs);
    4561                 :            : 
    4562                 :            : #define ICE_LAN_TXQ_MOVE_TIMEOUT_MAX 50
    4563         [ #  # ]:          0 :         if (timeout > ICE_LAN_TXQ_MOVE_TIMEOUT_MAX)
    4564                 :            :                 return ICE_ERR_PARAM;
    4565                 :            : 
    4566   [ #  #  #  # ]:          0 :         if (is_tc_change && !flush_pipe && !blocked_cgds)
    4567                 :            :                 return ICE_ERR_PARAM;
    4568                 :            : 
    4569         [ #  # ]:          0 :         if (!is_move && !is_tc_change)
    4570                 :            :                 return ICE_ERR_PARAM;
    4571                 :            : 
    4572                 :          0 :         desc.flags |= CPU_TO_LE16(ICE_AQ_FLAG_RD);
    4573                 :            : 
    4574         [ #  # ]:          0 :         if (is_move)
    4575                 :          0 :                 cmd->cmd_type |= ICE_AQC_Q_CMD_TYPE_MOVE;
    4576                 :            : 
    4577         [ #  # ]:          0 :         if (is_tc_change)
    4578                 :          0 :                 cmd->cmd_type |= ICE_AQC_Q_CMD_TYPE_TC_CHANGE;
    4579                 :            : 
    4580         [ #  # ]:          0 :         if (subseq_call)
    4581                 :          0 :                 cmd->cmd_type |= ICE_AQC_Q_CMD_SUBSEQ_CALL;
    4582                 :            : 
    4583         [ #  # ]:          0 :         if (flush_pipe)
    4584                 :          0 :                 cmd->cmd_type |= ICE_AQC_Q_CMD_FLUSH_PIPE;
    4585                 :            : 
    4586                 :          0 :         cmd->num_qs = num_qs;
    4587                 :          0 :         cmd->timeout = ((timeout << ICE_AQC_Q_CMD_TIMEOUT_S) &
    4588                 :            :                         ICE_AQC_Q_CMD_TIMEOUT_M);
    4589                 :            : 
    4590                 :          0 :         status = ice_aq_send_cmd(hw, &desc, buf, buf_size, cd);
    4591                 :            : 
    4592         [ #  # ]:          0 :         if (!status && txqs_moved)
    4593                 :          0 :                 *txqs_moved = cmd->num_qs;
    4594                 :            : 
    4595         [ #  # ]:          0 :         if (hw->adminq.sq_last_status == ICE_AQ_RC_EAGAIN &&
    4596         [ #  # ]:          0 :             is_tc_change && !flush_pipe)
    4597                 :          0 :                 *blocked_cgds = LE32_TO_CPU(cmd->blocked_cgds);
    4598                 :            : 
    4599                 :            :         return status;
    4600                 :            : }
    4601                 :            : 
    4602                 :            : /* End of FW Admin Queue command wrappers */
    4603                 :            : 
    4604                 :            : /**
    4605                 :            :  * ice_write_byte - write a byte to a packed context structure
    4606                 :            :  * @src_ctx:  the context structure to read from
    4607                 :            :  * @dest_ctx: the context to be written to
    4608                 :            :  * @ce_info:  a description of the struct to be filled
    4609                 :            :  */
    4610                 :            : static void
    4611                 :          0 : ice_write_byte(u8 *src_ctx, u8 *dest_ctx, const struct ice_ctx_ele *ce_info)
    4612                 :            : {
    4613                 :            :         u8 src_byte, dest_byte, mask;
    4614                 :            :         u8 *from, *dest;
    4615                 :            :         u16 shift_width;
    4616                 :            : 
    4617                 :            :         /* copy from the next struct field */
    4618                 :          0 :         from = src_ctx + ce_info->offset;
    4619                 :            : 
    4620                 :            :         /* prepare the bits and mask */
    4621                 :          0 :         shift_width = ce_info->lsb % 8;
    4622                 :          0 :         mask = (u8)(BIT(ce_info->width) - 1);
    4623                 :            : 
    4624                 :          0 :         src_byte = *from;
    4625                 :          0 :         src_byte &= mask;
    4626                 :            : 
    4627                 :            :         /* shift to correct alignment */
    4628                 :          0 :         mask <<= shift_width;
    4629                 :          0 :         src_byte <<= shift_width;
    4630                 :            : 
    4631                 :            :         /* get the current bits from the target bit string */
    4632         [ #  # ]:          0 :         dest = dest_ctx + (ce_info->lsb / 8);
    4633                 :            : 
    4634                 :            :         ice_memcpy(&dest_byte, dest, sizeof(dest_byte), ICE_DMA_TO_NONDMA);
    4635                 :            : 
    4636                 :          0 :         dest_byte &= ~mask; /* get the bits not changing */
    4637         [ #  # ]:          0 :         dest_byte |= src_byte;  /* add in the new bits */
    4638                 :            : 
    4639                 :            :         /* put it all back */
    4640                 :            :         ice_memcpy(dest, &dest_byte, sizeof(dest_byte), ICE_NONDMA_TO_DMA);
    4641                 :          0 : }
    4642                 :            : 
    4643                 :            : /**
    4644                 :            :  * ice_write_word - write a word to a packed context structure
    4645                 :            :  * @src_ctx:  the context structure to read from
    4646                 :            :  * @dest_ctx: the context to be written to
    4647                 :            :  * @ce_info:  a description of the struct to be filled
    4648                 :            :  */
    4649                 :            : static void
    4650                 :          0 : ice_write_word(u8 *src_ctx, u8 *dest_ctx, const struct ice_ctx_ele *ce_info)
    4651                 :            : {
    4652                 :            :         u16 src_word, mask;
    4653                 :            :         __le16 dest_word;
    4654                 :            :         u8 *from, *dest;
    4655                 :            :         u16 shift_width;
    4656                 :            : 
    4657                 :            :         /* copy from the next struct field */
    4658                 :          0 :         from = src_ctx + ce_info->offset;
    4659                 :            : 
    4660                 :            :         /* prepare the bits and mask */
    4661                 :          0 :         shift_width = ce_info->lsb % 8;
    4662                 :          0 :         mask = BIT(ce_info->width) - 1;
    4663                 :            : 
    4664                 :            :         /* don't swizzle the bits until after the mask because the mask bits
    4665                 :            :          * will be in a different bit position on big endian machines
    4666                 :            :          */
    4667                 :          0 :         src_word = *(u16 *)from;
    4668                 :          0 :         src_word &= mask;
    4669                 :            : 
    4670                 :            :         /* shift to correct alignment */
    4671                 :          0 :         mask <<= shift_width;
    4672                 :          0 :         src_word <<= shift_width;
    4673                 :            : 
    4674                 :            :         /* get the current bits from the target bit string */
    4675         [ #  # ]:          0 :         dest = dest_ctx + (ce_info->lsb / 8);
    4676                 :            : 
    4677                 :            :         ice_memcpy(&dest_word, dest, sizeof(dest_word), ICE_DMA_TO_NONDMA);
    4678                 :            : 
    4679                 :          0 :         dest_word &= ~(CPU_TO_LE16(mask));  /* get the bits not changing */
    4680         [ #  # ]:          0 :         dest_word |= CPU_TO_LE16(src_word);     /* add in the new bits */
    4681                 :            : 
    4682                 :            :         /* put it all back */
    4683                 :            :         ice_memcpy(dest, &dest_word, sizeof(dest_word), ICE_NONDMA_TO_DMA);
    4684                 :          0 : }
    4685                 :            : 
    4686                 :            : /**
    4687                 :            :  * ice_write_dword - write a dword to a packed context structure
    4688                 :            :  * @src_ctx:  the context structure to read from
    4689                 :            :  * @dest_ctx: the context to be written to
    4690                 :            :  * @ce_info:  a description of the struct to be filled
    4691                 :            :  */
    4692                 :            : static void
    4693                 :          0 : ice_write_dword(u8 *src_ctx, u8 *dest_ctx, const struct ice_ctx_ele *ce_info)
    4694                 :            : {
    4695                 :            :         u32 src_dword, mask;
    4696                 :            :         __le32 dest_dword;
    4697                 :            :         u8 *from, *dest;
    4698                 :            :         u16 shift_width;
    4699                 :            : 
    4700                 :            :         /* copy from the next struct field */
    4701                 :          0 :         from = src_ctx + ce_info->offset;
    4702                 :            : 
    4703                 :            :         /* prepare the bits and mask */
    4704                 :          0 :         shift_width = ce_info->lsb % 8;
    4705                 :            : 
    4706                 :            :         /* if the field width is exactly 32 on an x86 machine, then the shift
    4707                 :            :          * operation will not work because the SHL instructions count is masked
    4708                 :            :          * to 5 bits so the shift will do nothing
    4709                 :            :          */
    4710         [ #  # ]:          0 :         if (ce_info->width < 32)
    4711                 :          0 :                 mask = BIT(ce_info->width) - 1;
    4712                 :            :         else
    4713                 :            :                 mask = (u32)~0;
    4714                 :            : 
    4715                 :            :         /* don't swizzle the bits until after the mask because the mask bits
    4716                 :            :          * will be in a different bit position on big endian machines
    4717                 :            :          */
    4718                 :          0 :         src_dword = *(u32 *)from;
    4719                 :          0 :         src_dword &= mask;
    4720                 :            : 
    4721                 :            :         /* shift to correct alignment */
    4722                 :          0 :         mask <<= shift_width;
    4723                 :          0 :         src_dword <<= shift_width;
    4724                 :            : 
    4725                 :            :         /* get the current bits from the target bit string */
    4726         [ #  # ]:          0 :         dest = dest_ctx + (ce_info->lsb / 8);
    4727                 :            : 
    4728                 :            :         ice_memcpy(&dest_dword, dest, sizeof(dest_dword), ICE_DMA_TO_NONDMA);
    4729                 :            : 
    4730                 :          0 :         dest_dword &= ~(CPU_TO_LE32(mask)); /* get the bits not changing */
    4731         [ #  # ]:          0 :         dest_dword |= CPU_TO_LE32(src_dword);   /* add in the new bits */
    4732                 :            : 
    4733                 :            :         /* put it all back */
    4734                 :            :         ice_memcpy(dest, &dest_dword, sizeof(dest_dword), ICE_NONDMA_TO_DMA);
    4735                 :          0 : }
    4736                 :            : 
    4737                 :            : /**
    4738                 :            :  * ice_write_qword - write a qword to a packed context structure
    4739                 :            :  * @src_ctx:  the context structure to read from
    4740                 :            :  * @dest_ctx: the context to be written to
    4741                 :            :  * @ce_info:  a description of the struct to be filled
    4742                 :            :  */
    4743                 :            : static void
    4744                 :          0 : ice_write_qword(u8 *src_ctx, u8 *dest_ctx, const struct ice_ctx_ele *ce_info)
    4745                 :            : {
    4746                 :            :         u64 src_qword, mask;
    4747                 :            :         __le64 dest_qword;
    4748                 :            :         u8 *from, *dest;
    4749                 :            :         u16 shift_width;
    4750                 :            : 
    4751                 :            :         /* copy from the next struct field */
    4752                 :          0 :         from = src_ctx + ce_info->offset;
    4753                 :            : 
    4754                 :            :         /* prepare the bits and mask */
    4755                 :          0 :         shift_width = ce_info->lsb % 8;
    4756                 :            : 
    4757                 :            :         /* if the field width is exactly 64 on an x86 machine, then the shift
    4758                 :            :          * operation will not work because the SHL instructions count is masked
    4759                 :            :          * to 6 bits so the shift will do nothing
    4760                 :            :          */
    4761         [ #  # ]:          0 :         if (ce_info->width < 64)
    4762                 :          0 :                 mask = BIT_ULL(ce_info->width) - 1;
    4763                 :            :         else
    4764                 :            :                 mask = (u64)~0;
    4765                 :            : 
    4766                 :            :         /* don't swizzle the bits until after the mask because the mask bits
    4767                 :            :          * will be in a different bit position on big endian machines
    4768                 :            :          */
    4769                 :          0 :         src_qword = *(u64 *)from;
    4770                 :          0 :         src_qword &= mask;
    4771                 :            : 
    4772                 :            :         /* shift to correct alignment */
    4773                 :          0 :         mask <<= shift_width;
    4774                 :          0 :         src_qword <<= shift_width;
    4775                 :            : 
    4776                 :            :         /* get the current bits from the target bit string */
    4777         [ #  # ]:          0 :         dest = dest_ctx + (ce_info->lsb / 8);
    4778                 :            : 
    4779                 :            :         ice_memcpy(&dest_qword, dest, sizeof(dest_qword), ICE_DMA_TO_NONDMA);
    4780                 :            : 
    4781                 :          0 :         dest_qword &= ~(CPU_TO_LE64(mask)); /* get the bits not changing */
    4782         [ #  # ]:          0 :         dest_qword |= CPU_TO_LE64(src_qword);   /* add in the new bits */
    4783                 :            : 
    4784                 :            :         /* put it all back */
    4785                 :            :         ice_memcpy(dest, &dest_qword, sizeof(dest_qword), ICE_NONDMA_TO_DMA);
    4786                 :          0 : }
    4787                 :            : 
    4788                 :            : /**
    4789                 :            :  * ice_set_ctx - set context bits in packed structure
    4790                 :            :  * @hw: pointer to the hardware structure
    4791                 :            :  * @src_ctx:  pointer to a generic non-packed context structure
    4792                 :            :  * @dest_ctx: pointer to memory for the packed structure
    4793                 :            :  * @ce_info:  a description of the structure to be transformed
    4794                 :            :  */
    4795                 :            : enum ice_status
    4796                 :          0 : ice_set_ctx(struct ice_hw *hw, u8 *src_ctx, u8 *dest_ctx,
    4797                 :            :             const struct ice_ctx_ele *ce_info)
    4798                 :            : {
    4799                 :            :         int f;
    4800                 :            : 
    4801         [ #  # ]:          0 :         for (f = 0; ce_info[f].width; f++) {
    4802                 :            :                 /* We have to deal with each element of the FW response
    4803                 :            :                  * using the correct size so that we are correct regardless
    4804                 :            :                  * of the endianness of the machine.
    4805                 :            :                  */
    4806         [ #  # ]:          0 :                 if (ce_info[f].width > (ce_info[f].size_of * BITS_PER_BYTE)) {
    4807         [ #  # ]:          0 :                         ice_debug(hw, ICE_DBG_QCTX, "Field %d width of %d bits larger than size of %d byte(s) ... skipping write\n",
    4808                 :            :                                   f, ce_info[f].width, ce_info[f].size_of);
    4809                 :          0 :                         continue;
    4810                 :            :                 }
    4811   [ #  #  #  #  :          0 :                 switch (ce_info[f].size_of) {
                      # ]
    4812                 :          0 :                 case sizeof(u8):
    4813                 :          0 :                         ice_write_byte(src_ctx, dest_ctx, &ce_info[f]);
    4814                 :          0 :                         break;
    4815                 :          0 :                 case sizeof(u16):
    4816                 :          0 :                         ice_write_word(src_ctx, dest_ctx, &ce_info[f]);
    4817                 :          0 :                         break;
    4818                 :          0 :                 case sizeof(u32):
    4819                 :          0 :                         ice_write_dword(src_ctx, dest_ctx, &ce_info[f]);
    4820                 :          0 :                         break;
    4821                 :          0 :                 case sizeof(u64):
    4822                 :          0 :                         ice_write_qword(src_ctx, dest_ctx, &ce_info[f]);
    4823                 :          0 :                         break;
    4824                 :            :                 default:
    4825                 :            :                         return ICE_ERR_INVAL_SIZE;
    4826                 :            :                 }
    4827                 :            :         }
    4828                 :            : 
    4829                 :            :         return ICE_SUCCESS;
    4830                 :            : }
    4831                 :            : 
    4832                 :            : /**
    4833                 :            :  * ice_aq_get_internal_data
    4834                 :            :  * @hw: pointer to the hardware structure
    4835                 :            :  * @cluster_id: specific cluster to dump
    4836                 :            :  * @table_id: table ID within cluster
    4837                 :            :  * @start: index of line in the block to read
    4838                 :            :  * @buf: dump buffer
    4839                 :            :  * @buf_size: dump buffer size
    4840                 :            :  * @ret_buf_size: return buffer size (returned by FW)
    4841                 :            :  * @ret_next_table: next block to read (returned by FW)
    4842                 :            :  * @ret_next_index: next index to read (returned by FW)
    4843                 :            :  * @cd: pointer to command details structure
    4844                 :            :  *
    4845                 :            :  * Get internal FW/HW data (0xFF08) for debug purposes.
    4846                 :            :  */
    4847                 :            : enum ice_status
    4848                 :          0 : ice_aq_get_internal_data(struct ice_hw *hw, u8 cluster_id, u16 table_id,
    4849                 :            :                          u32 start, void *buf, u16 buf_size, u16 *ret_buf_size,
    4850                 :            :                          u16 *ret_next_table, u32 *ret_next_index,
    4851                 :            :                          struct ice_sq_cd *cd)
    4852                 :            : {
    4853                 :            :         struct ice_aqc_debug_dump_internals *cmd;
    4854                 :            :         struct ice_aq_desc desc;
    4855                 :            :         enum ice_status status;
    4856                 :            : 
    4857                 :            :         cmd = &desc.params.debug_dump;
    4858                 :            : 
    4859         [ #  # ]:          0 :         if (buf_size == 0 || !buf)
    4860                 :            :                 return ICE_ERR_PARAM;
    4861                 :            : 
    4862                 :          0 :         ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_debug_dump_internals);
    4863                 :            : 
    4864                 :          0 :         cmd->cluster_id = cluster_id;
    4865                 :          0 :         cmd->table_id = CPU_TO_LE16(table_id);
    4866                 :          0 :         cmd->idx = CPU_TO_LE32(start);
    4867                 :            : 
    4868                 :          0 :         status = ice_aq_send_cmd(hw, &desc, buf, buf_size, cd);
    4869                 :            : 
    4870         [ #  # ]:          0 :         if (!status) {
    4871         [ #  # ]:          0 :                 if (ret_buf_size)
    4872                 :          0 :                         *ret_buf_size = LE16_TO_CPU(desc.datalen);
    4873         [ #  # ]:          0 :                 if (ret_next_table)
    4874                 :          0 :                         *ret_next_table = LE16_TO_CPU(cmd->table_id);
    4875         [ #  # ]:          0 :                 if (ret_next_index)
    4876                 :          0 :                         *ret_next_index = LE32_TO_CPU(cmd->idx);
    4877                 :            :         }
    4878                 :            : 
    4879                 :            :         return status;
    4880                 :            : }
    4881                 :            : 
    4882                 :            : /**
    4883                 :            :  * ice_read_byte - read context byte into struct
    4884                 :            :  * @src_ctx:  the context structure to read from
    4885                 :            :  * @dest_ctx: the context to be written to
    4886                 :            :  * @ce_info:  a description of the struct to be filled
    4887                 :            :  */
    4888                 :            : static void
    4889                 :          0 : ice_read_byte(u8 *src_ctx, u8 *dest_ctx, const struct ice_ctx_ele *ce_info)
    4890                 :            : {
    4891                 :            :         u8 dest_byte, mask;
    4892                 :            :         u8 *src, *target;
    4893                 :            :         u16 shift_width;
    4894                 :            : 
    4895                 :            :         /* prepare the bits and mask */
    4896                 :          0 :         shift_width = ce_info->lsb % 8;
    4897                 :          0 :         mask = (u8)(BIT(ce_info->width) - 1);
    4898                 :            : 
    4899                 :            :         /* shift to correct alignment */
    4900                 :          0 :         mask <<= shift_width;
    4901                 :            : 
    4902                 :            :         /* get the current bits from the src bit string */
    4903         [ #  # ]:          0 :         src = src_ctx + (ce_info->lsb / 8);
    4904                 :            : 
    4905                 :            :         ice_memcpy(&dest_byte, src, sizeof(dest_byte), ICE_DMA_TO_NONDMA);
    4906                 :            : 
    4907                 :          0 :         dest_byte &= ~(mask);
    4908                 :            : 
    4909                 :          0 :         dest_byte >>= shift_width;
    4910                 :            : 
    4911                 :            :         /* get the address from the struct field */
    4912         [ #  # ]:          0 :         target = dest_ctx + ce_info->offset;
    4913                 :            : 
    4914                 :            :         /* put it back in the struct */
    4915                 :            :         ice_memcpy(target, &dest_byte, sizeof(dest_byte), ICE_NONDMA_TO_DMA);
    4916                 :          0 : }
    4917                 :            : 
    4918                 :            : /**
    4919                 :            :  * ice_read_word - read context word into struct
    4920                 :            :  * @src_ctx:  the context structure to read from
    4921                 :            :  * @dest_ctx: the context to be written to
    4922                 :            :  * @ce_info:  a description of the struct to be filled
    4923                 :            :  */
    4924                 :            : static void
    4925                 :          0 : ice_read_word(u8 *src_ctx, u8 *dest_ctx, const struct ice_ctx_ele *ce_info)
    4926                 :            : {
    4927                 :            :         u16 dest_word, mask;
    4928                 :            :         u8 *src, *target;
    4929                 :            :         __le16 src_word;
    4930                 :            :         u16 shift_width;
    4931                 :            : 
    4932                 :            :         /* prepare the bits and mask */
    4933                 :          0 :         shift_width = ce_info->lsb % 8;
    4934                 :          0 :         mask = BIT(ce_info->width) - 1;
    4935                 :            : 
    4936                 :            :         /* shift to correct alignment */
    4937                 :          0 :         mask <<= shift_width;
    4938                 :            : 
    4939                 :            :         /* get the current bits from the src bit string */
    4940         [ #  # ]:          0 :         src = src_ctx + (ce_info->lsb / 8);
    4941                 :            : 
    4942                 :            :         ice_memcpy(&src_word, src, sizeof(src_word), ICE_DMA_TO_NONDMA);
    4943                 :            : 
    4944                 :            :         /* the data in the memory is stored as little endian so mask it
    4945                 :            :          * correctly
    4946                 :            :          */
    4947                 :          0 :         src_word &= ~(CPU_TO_LE16(mask));
    4948                 :            : 
    4949                 :            :         /* get the data back into host order before shifting */
    4950                 :            :         dest_word = LE16_TO_CPU(src_word);
    4951                 :            : 
    4952                 :          0 :         dest_word >>= shift_width;
    4953                 :            : 
    4954                 :            :         /* get the address from the struct field */
    4955         [ #  # ]:          0 :         target = dest_ctx + ce_info->offset;
    4956                 :            : 
    4957                 :            :         /* put it back in the struct */
    4958                 :            :         ice_memcpy(target, &dest_word, sizeof(dest_word), ICE_NONDMA_TO_DMA);
    4959                 :          0 : }
    4960                 :            : 
    4961                 :            : /**
    4962                 :            :  * ice_read_dword - read context dword into struct
    4963                 :            :  * @src_ctx:  the context structure to read from
    4964                 :            :  * @dest_ctx: the context to be written to
    4965                 :            :  * @ce_info:  a description of the struct to be filled
    4966                 :            :  */
    4967                 :            : static void
    4968                 :          0 : ice_read_dword(u8 *src_ctx, u8 *dest_ctx, const struct ice_ctx_ele *ce_info)
    4969                 :            : {
    4970                 :            :         u32 dest_dword, mask;
    4971                 :            :         __le32 src_dword;
    4972                 :            :         u8 *src, *target;
    4973                 :            :         u16 shift_width;
    4974                 :            : 
    4975                 :            :         /* prepare the bits and mask */
    4976                 :          0 :         shift_width = ce_info->lsb % 8;
    4977                 :            : 
    4978                 :            :         /* if the field width is exactly 32 on an x86 machine, then the shift
    4979                 :            :          * operation will not work because the SHL instructions count is masked
    4980                 :            :          * to 5 bits so the shift will do nothing
    4981                 :            :          */
    4982         [ #  # ]:          0 :         if (ce_info->width < 32)
    4983                 :          0 :                 mask = BIT(ce_info->width) - 1;
    4984                 :            :         else
    4985                 :            :                 mask = (u32)~0;
    4986                 :            : 
    4987                 :            :         /* shift to correct alignment */
    4988                 :          0 :         mask <<= shift_width;
    4989                 :            : 
    4990                 :            :         /* get the current bits from the src bit string */
    4991         [ #  # ]:          0 :         src = src_ctx + (ce_info->lsb / 8);
    4992                 :            : 
    4993                 :            :         ice_memcpy(&src_dword, src, sizeof(src_dword), ICE_DMA_TO_NONDMA);
    4994                 :            : 
    4995                 :            :         /* the data in the memory is stored as little endian so mask it
    4996                 :            :          * correctly
    4997                 :            :          */
    4998                 :          0 :         src_dword &= ~(CPU_TO_LE32(mask));
    4999                 :            : 
    5000                 :            :         /* get the data back into host order before shifting */
    5001                 :            :         dest_dword = LE32_TO_CPU(src_dword);
    5002                 :            : 
    5003                 :          0 :         dest_dword >>= shift_width;
    5004                 :            : 
    5005                 :            :         /* get the address from the struct field */
    5006         [ #  # ]:          0 :         target = dest_ctx + ce_info->offset;
    5007                 :            : 
    5008                 :            :         /* put it back in the struct */
    5009                 :            :         ice_memcpy(target, &dest_dword, sizeof(dest_dword), ICE_NONDMA_TO_DMA);
    5010                 :          0 : }
    5011                 :            : 
    5012                 :            : /**
    5013                 :            :  * ice_read_qword - read context qword into struct
    5014                 :            :  * @src_ctx:  the context structure to read from
    5015                 :            :  * @dest_ctx: the context to be written to
    5016                 :            :  * @ce_info:  a description of the struct to be filled
    5017                 :            :  */
    5018                 :            : static void
    5019                 :          0 : ice_read_qword(u8 *src_ctx, u8 *dest_ctx, const struct ice_ctx_ele *ce_info)
    5020                 :            : {
    5021                 :            :         u64 dest_qword, mask;
    5022                 :            :         __le64 src_qword;
    5023                 :            :         u8 *src, *target;
    5024                 :            :         u16 shift_width;
    5025                 :            : 
    5026                 :            :         /* prepare the bits and mask */
    5027                 :          0 :         shift_width = ce_info->lsb % 8;
    5028                 :            : 
    5029                 :            :         /* if the field width is exactly 64 on an x86 machine, then the shift
    5030                 :            :          * operation will not work because the SHL instructions count is masked
    5031                 :            :          * to 6 bits so the shift will do nothing
    5032                 :            :          */
    5033         [ #  # ]:          0 :         if (ce_info->width < 64)
    5034                 :          0 :                 mask = BIT_ULL(ce_info->width) - 1;
    5035                 :            :         else
    5036                 :            :                 mask = (u64)~0;
    5037                 :            : 
    5038                 :            :         /* shift to correct alignment */
    5039                 :          0 :         mask <<= shift_width;
    5040                 :            : 
    5041                 :            :         /* get the current bits from the src bit string */
    5042         [ #  # ]:          0 :         src = src_ctx + (ce_info->lsb / 8);
    5043                 :            : 
    5044                 :            :         ice_memcpy(&src_qword, src, sizeof(src_qword), ICE_DMA_TO_NONDMA);
    5045                 :            : 
    5046                 :            :         /* the data in the memory is stored as little endian so mask it
    5047                 :            :          * correctly
    5048                 :            :          */
    5049                 :          0 :         src_qword &= ~(CPU_TO_LE64(mask));
    5050                 :            : 
    5051                 :            :         /* get the data back into host order before shifting */
    5052                 :            :         dest_qword = LE64_TO_CPU(src_qword);
    5053                 :            : 
    5054                 :          0 :         dest_qword >>= shift_width;
    5055                 :            : 
    5056                 :            :         /* get the address from the struct field */
    5057         [ #  # ]:          0 :         target = dest_ctx + ce_info->offset;
    5058                 :            : 
    5059                 :            :         /* put it back in the struct */
    5060                 :            :         ice_memcpy(target, &dest_qword, sizeof(dest_qword), ICE_NONDMA_TO_DMA);
    5061                 :          0 : }
    5062                 :            : 
    5063                 :            : /**
    5064                 :            :  * ice_get_ctx - extract context bits from a packed structure
    5065                 :            :  * @src_ctx:  pointer to a generic packed context structure
    5066                 :            :  * @dest_ctx: pointer to a generic non-packed context structure
    5067                 :            :  * @ce_info:  a description of the structure to be read from
    5068                 :            :  */
    5069                 :            : enum ice_status
    5070                 :          0 : ice_get_ctx(u8 *src_ctx, u8 *dest_ctx, const struct ice_ctx_ele *ce_info)
    5071                 :            : {
    5072                 :            :         int f;
    5073                 :            : 
    5074         [ #  # ]:          0 :         for (f = 0; ce_info[f].width; f++) {
    5075   [ #  #  #  #  :          0 :                 switch (ce_info[f].size_of) {
                      # ]
    5076                 :          0 :                 case 1:
    5077                 :          0 :                         ice_read_byte(src_ctx, dest_ctx, &ce_info[f]);
    5078                 :          0 :                         break;
    5079                 :          0 :                 case 2:
    5080                 :          0 :                         ice_read_word(src_ctx, dest_ctx, &ce_info[f]);
    5081                 :          0 :                         break;
    5082                 :          0 :                 case 4:
    5083                 :          0 :                         ice_read_dword(src_ctx, dest_ctx, &ce_info[f]);
    5084                 :          0 :                         break;
    5085                 :          0 :                 case 8:
    5086                 :          0 :                         ice_read_qword(src_ctx, dest_ctx, &ce_info[f]);
    5087                 :          0 :                         break;
    5088                 :            :                 default:
    5089                 :            :                         /* nothing to do, just keep going */
    5090                 :            :                         break;
    5091                 :            :                 }
    5092                 :            :         }
    5093                 :            : 
    5094                 :          0 :         return ICE_SUCCESS;
    5095                 :            : }
    5096                 :            : 
    5097                 :            : /**
    5098                 :            :  * ice_get_lan_q_ctx - get the LAN queue context for the given VSI and TC
    5099                 :            :  * @hw: pointer to the HW struct
    5100                 :            :  * @vsi_handle: software VSI handle
    5101                 :            :  * @tc: TC number
    5102                 :            :  * @q_handle: software queue handle
    5103                 :            :  */
    5104                 :            : struct ice_q_ctx *
    5105                 :          0 : ice_get_lan_q_ctx(struct ice_hw *hw, u16 vsi_handle, u8 tc, u16 q_handle)
    5106                 :            : {
    5107                 :            :         struct ice_vsi_ctx *vsi;
    5108                 :            :         struct ice_q_ctx *q_ctx;
    5109                 :            : 
    5110                 :          0 :         vsi = ice_get_vsi_ctx(hw, vsi_handle);
    5111         [ #  # ]:          0 :         if (!vsi)
    5112                 :            :                 return NULL;
    5113         [ #  # ]:          0 :         if (q_handle >= vsi->num_lan_q_entries[tc])
    5114                 :            :                 return NULL;
    5115         [ #  # ]:          0 :         if (!vsi->lan_q_ctx[tc])
    5116                 :            :                 return NULL;
    5117                 :            :         q_ctx = vsi->lan_q_ctx[tc];
    5118                 :          0 :         return &q_ctx[q_handle];
    5119                 :            : }
    5120                 :            : 
    5121                 :            : /**
    5122                 :            :  * ice_ena_vsi_txq
    5123                 :            :  * @pi: port information structure
    5124                 :            :  * @vsi_handle: software VSI handle
    5125                 :            :  * @tc: TC number
    5126                 :            :  * @q_handle: software queue handle
    5127                 :            :  * @num_qgrps: Number of added queue groups
    5128                 :            :  * @buf: list of queue groups to be added
    5129                 :            :  * @buf_size: size of buffer for indirect command
    5130                 :            :  * @cd: pointer to command details structure or NULL
    5131                 :            :  *
    5132                 :            :  * This function adds one LAN queue
    5133                 :            :  */
    5134                 :            : enum ice_status
    5135                 :          0 : ice_ena_vsi_txq(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u16 q_handle,
    5136                 :            :                 u8 num_qgrps, struct ice_aqc_add_tx_qgrp *buf, u16 buf_size,
    5137                 :            :                 struct ice_sq_cd *cd)
    5138                 :            : {
    5139                 :          0 :         struct ice_aqc_txsched_elem_data node = { 0 };
    5140                 :            :         struct ice_sched_node *parent;
    5141                 :            :         struct ice_q_ctx *q_ctx;
    5142                 :            :         enum ice_status status;
    5143                 :            :         struct ice_hw *hw;
    5144                 :            : 
    5145   [ #  #  #  # ]:          0 :         if (!pi || pi->port_state != ICE_SCHED_PORT_STATE_READY)
    5146                 :            :                 return ICE_ERR_CFG;
    5147                 :            : 
    5148   [ #  #  #  # ]:          0 :         if (num_qgrps > 1 || buf->num_txqs > 1)
    5149                 :            :                 return ICE_ERR_MAX_LIMIT;
    5150                 :            : 
    5151                 :          0 :         hw = pi->hw;
    5152                 :            : 
    5153         [ #  # ]:          0 :         if (!ice_is_vsi_valid(hw, vsi_handle))
    5154                 :            :                 return ICE_ERR_PARAM;
    5155                 :            : 
    5156                 :          0 :         ice_acquire_lock(&pi->sched_lock);
    5157                 :            : 
    5158                 :          0 :         q_ctx = ice_get_lan_q_ctx(hw, vsi_handle, tc, q_handle);
    5159         [ #  # ]:          0 :         if (!q_ctx) {
    5160         [ #  # ]:          0 :                 ice_debug(hw, ICE_DBG_SCHED, "Enaq: invalid queue handle %d\n",
    5161                 :            :                           q_handle);
    5162                 :            :                 status = ICE_ERR_PARAM;
    5163                 :          0 :                 goto ena_txq_exit;
    5164                 :            :         }
    5165                 :            : 
    5166                 :            :         /* find a parent node */
    5167                 :          0 :         parent = ice_sched_get_free_qparent(pi, vsi_handle, tc,
    5168                 :            :                                             ICE_SCHED_NODE_OWNER_LAN);
    5169         [ #  # ]:          0 :         if (!parent) {
    5170                 :            :                 status = ICE_ERR_PARAM;
    5171                 :          0 :                 goto ena_txq_exit;
    5172                 :            :         }
    5173                 :            : 
    5174                 :          0 :         buf->parent_teid = parent->info.node_teid;
    5175                 :          0 :         node.parent_teid = parent->info.node_teid;
    5176                 :            :         /* Mark that the values in the "generic" section as valid. The default
    5177                 :            :          * value in the "generic" section is zero. This means that :
    5178                 :            :          * - Scheduling mode is Bytes Per Second (BPS), indicated by Bit 0.
    5179                 :            :          * - 0 priority among siblings, indicated by Bit 1-3.
    5180                 :            :          * - WFQ, indicated by Bit 4.
    5181                 :            :          * - 0 Adjustment value is used in PSM credit update flow, indicated by
    5182                 :            :          * Bit 5-6.
    5183                 :            :          * - Bit 7 is reserved.
    5184                 :            :          * Without setting the generic section as valid in valid_sections, the
    5185                 :            :          * Admin queue command will fail with error code ICE_AQ_RC_EINVAL.
    5186                 :            :          */
    5187                 :          0 :         buf->txqs[0].info.valid_sections =
    5188                 :            :                 ICE_AQC_ELEM_VALID_GENERIC | ICE_AQC_ELEM_VALID_CIR |
    5189                 :            :                 ICE_AQC_ELEM_VALID_EIR;
    5190                 :          0 :         buf->txqs[0].info.generic = 0;
    5191                 :          0 :         buf->txqs[0].info.cir_bw.bw_profile_idx =
    5192                 :            :                 CPU_TO_LE16(ICE_SCHED_DFLT_RL_PROF_ID);
    5193                 :          0 :         buf->txqs[0].info.cir_bw.bw_alloc =
    5194                 :            :                 CPU_TO_LE16(ICE_SCHED_DFLT_BW_WT);
    5195                 :          0 :         buf->txqs[0].info.eir_bw.bw_profile_idx =
    5196                 :            :                 CPU_TO_LE16(ICE_SCHED_DFLT_RL_PROF_ID);
    5197                 :          0 :         buf->txqs[0].info.eir_bw.bw_alloc =
    5198                 :            :                 CPU_TO_LE16(ICE_SCHED_DFLT_BW_WT);
    5199                 :            : 
    5200                 :            :         /* add the LAN queue */
    5201                 :          0 :         status = ice_aq_add_lan_txq(hw, num_qgrps, buf, buf_size, cd);
    5202         [ #  # ]:          0 :         if (status != ICE_SUCCESS) {
    5203         [ #  # ]:          0 :                 ice_debug(hw, ICE_DBG_SCHED, "enable queue %d failed %d\n",
    5204                 :            :                           LE16_TO_CPU(buf->txqs[0].txq_id),
    5205                 :            :                           hw->adminq.sq_last_status);
    5206                 :          0 :                 goto ena_txq_exit;
    5207                 :            :         }
    5208                 :            : 
    5209                 :          0 :         node.node_teid = buf->txqs[0].q_teid;
    5210                 :          0 :         node.data.elem_type = ICE_AQC_ELEM_TYPE_LEAF;
    5211                 :          0 :         q_ctx->q_handle = q_handle;
    5212                 :          0 :         q_ctx->q_teid = LE32_TO_CPU(node.node_teid);
    5213                 :            : 
    5214                 :            :         /* add a leaf node into scheduler tree queue layer */
    5215                 :          0 :         status = ice_sched_add_node(pi, hw->num_tx_sched_layers - 1, &node, NULL);
    5216         [ #  # ]:          0 :         if (!status)
    5217                 :          0 :                 status = ice_sched_replay_q_bw(pi, q_ctx);
    5218                 :            : 
    5219                 :          0 : ena_txq_exit:
    5220                 :            :         ice_release_lock(&pi->sched_lock);
    5221                 :          0 :         return status;
    5222                 :            : }
    5223                 :            : 
    5224                 :            : /**
    5225                 :            :  * ice_dis_vsi_txq
    5226                 :            :  * @pi: port information structure
    5227                 :            :  * @vsi_handle: software VSI handle
    5228                 :            :  * @tc: TC number
    5229                 :            :  * @num_queues: number of queues
    5230                 :            :  * @q_handles: pointer to software queue handle array
    5231                 :            :  * @q_ids: pointer to the q_id array
    5232                 :            :  * @q_teids: pointer to queue node teids
    5233                 :            :  * @rst_src: if called due to reset, specifies the reset source
    5234                 :            :  * @vmvf_num: the relative VM or VF number that is undergoing the reset
    5235                 :            :  * @cd: pointer to command details structure or NULL
    5236                 :            :  *
    5237                 :            :  * This function removes queues and their corresponding nodes in SW DB
    5238                 :            :  */
    5239                 :            : enum ice_status
    5240                 :          0 : ice_dis_vsi_txq(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u8 num_queues,
    5241                 :            :                 u16 *q_handles, u16 *q_ids, u32 *q_teids,
    5242                 :            :                 enum ice_disq_rst_src rst_src, u16 vmvf_num,
    5243                 :            :                 struct ice_sq_cd *cd)
    5244                 :            : {
    5245                 :            :         enum ice_status status = ICE_ERR_DOES_NOT_EXIST;
    5246                 :            :         struct ice_aqc_dis_txq_item *qg_list;
    5247                 :            :         struct ice_q_ctx *q_ctx;
    5248                 :            :         struct ice_hw *hw;
    5249                 :            :         u16 i, buf_size;
    5250                 :            : 
    5251   [ #  #  #  # ]:          0 :         if (!pi || pi->port_state != ICE_SCHED_PORT_STATE_READY)
    5252                 :            :                 return ICE_ERR_CFG;
    5253                 :            : 
    5254                 :          0 :         hw = pi->hw;
    5255                 :            : 
    5256         [ #  # ]:          0 :         if (!num_queues) {
    5257                 :            :                 /* if queue is disabled already yet the disable queue command
    5258                 :            :                  * has to be sent to complete the VF reset, then call
    5259                 :            :                  * ice_aq_dis_lan_txq without any queue information
    5260                 :            :                  */
    5261         [ #  # ]:          0 :                 if (rst_src)
    5262                 :          0 :                         return ice_aq_dis_lan_txq(hw, 0, NULL, 0, rst_src,
    5263                 :            :                                                   vmvf_num, NULL);
    5264                 :            :                 return ICE_ERR_CFG;
    5265                 :            :         }
    5266                 :            : 
    5267                 :            :         buf_size = ice_struct_size(qg_list, q_id, 1);
    5268                 :          0 :         qg_list = (struct ice_aqc_dis_txq_item *)ice_malloc(hw, buf_size);
    5269         [ #  # ]:          0 :         if (!qg_list)
    5270                 :            :                 return ICE_ERR_NO_MEMORY;
    5271                 :            : 
    5272                 :          0 :         ice_acquire_lock(&pi->sched_lock);
    5273                 :            : 
    5274         [ #  # ]:          0 :         for (i = 0; i < num_queues; i++) {
    5275                 :            :                 struct ice_sched_node *node;
    5276                 :            : 
    5277                 :          0 :                 node = ice_sched_find_node_by_teid(pi->root, q_teids[i]);
    5278         [ #  # ]:          0 :                 if (!node)
    5279                 :          0 :                         continue;
    5280                 :          0 :                 q_ctx = ice_get_lan_q_ctx(hw, vsi_handle, tc, q_handles[i]);
    5281         [ #  # ]:          0 :                 if (!q_ctx) {
    5282         [ #  # ]:          0 :                         ice_debug(hw, ICE_DBG_SCHED, "invalid queue handle%d\n",
    5283                 :            :                                   q_handles[i]);
    5284                 :          0 :                         continue;
    5285                 :            :                 }
    5286         [ #  # ]:          0 :                 if (q_ctx->q_handle != q_handles[i]) {
    5287         [ #  # ]:          0 :                         ice_debug(hw, ICE_DBG_SCHED, "Err:handles %d %d\n",
    5288                 :            :                                   q_ctx->q_handle, q_handles[i]);
    5289                 :          0 :                         continue;
    5290                 :            :                 }
    5291                 :          0 :                 qg_list->parent_teid = node->info.parent_teid;
    5292                 :          0 :                 qg_list->num_qs = 1;
    5293                 :          0 :                 qg_list->q_id[0] = CPU_TO_LE16(q_ids[i]);
    5294                 :          0 :                 status = ice_aq_dis_lan_txq(hw, 1, qg_list, buf_size, rst_src,
    5295                 :            :                                             vmvf_num, cd);
    5296                 :            : 
    5297         [ #  # ]:          0 :                 if (status != ICE_SUCCESS)
    5298                 :            :                         break;
    5299                 :          0 :                 ice_free_sched_node(pi, node);
    5300                 :          0 :                 q_ctx->q_handle = ICE_INVAL_Q_HANDLE;
    5301                 :            :         }
    5302                 :            :         ice_release_lock(&pi->sched_lock);
    5303                 :          0 :         ice_free(hw, qg_list);
    5304                 :          0 :         return status;
    5305                 :            : }
    5306                 :            : 
    5307                 :            : /**
    5308                 :            :  * ice_cfg_vsi_qs - configure the new/existing VSI queues
    5309                 :            :  * @pi: port information structure
    5310                 :            :  * @vsi_handle: software VSI handle
    5311                 :            :  * @tc_bitmap: TC bitmap
    5312                 :            :  * @maxqs: max queues array per TC
    5313                 :            :  * @owner: LAN or RDMA
    5314                 :            :  *
    5315                 :            :  * This function adds/updates the VSI queues per TC.
    5316                 :            :  */
    5317                 :            : static enum ice_status
    5318                 :          0 : ice_cfg_vsi_qs(struct ice_port_info *pi, u16 vsi_handle, u16 tc_bitmap,
    5319                 :            :                u16 *maxqs, u8 owner)
    5320                 :            : {
    5321                 :            :         enum ice_status status = ICE_SUCCESS;
    5322                 :            :         u8 i;
    5323                 :            : 
    5324   [ #  #  #  # ]:          0 :         if (!pi || pi->port_state != ICE_SCHED_PORT_STATE_READY)
    5325                 :            :                 return ICE_ERR_CFG;
    5326                 :            : 
    5327         [ #  # ]:          0 :         if (!ice_is_vsi_valid(pi->hw, vsi_handle))
    5328                 :            :                 return ICE_ERR_PARAM;
    5329                 :            : 
    5330                 :          0 :         ice_acquire_lock(&pi->sched_lock);
    5331                 :            : 
    5332         [ #  # ]:          0 :         ice_for_each_traffic_class(i) {
    5333                 :            :                 /* configuration is possible only if TC node is present */
    5334         [ #  # ]:          0 :                 if (!ice_sched_get_tc_node(pi, i))
    5335                 :          0 :                         continue;
    5336                 :            : 
    5337                 :          0 :                 status = ice_sched_cfg_vsi(pi, vsi_handle, i, maxqs[i], owner,
    5338                 :          0 :                                            ice_is_tc_ena(tc_bitmap, i));
    5339         [ #  # ]:          0 :                 if (status)
    5340                 :            :                         break;
    5341                 :            :         }
    5342                 :            : 
    5343                 :            :         ice_release_lock(&pi->sched_lock);
    5344                 :          0 :         return status;
    5345                 :            : }
    5346                 :            : 
    5347                 :            : /**
    5348                 :            :  * ice_cfg_vsi_lan - configure VSI LAN queues
    5349                 :            :  * @pi: port information structure
    5350                 :            :  * @vsi_handle: software VSI handle
    5351                 :            :  * @tc_bitmap: TC bitmap
    5352                 :            :  * @max_lanqs: max LAN queues array per TC
    5353                 :            :  *
    5354                 :            :  * This function adds/updates the VSI LAN queues per TC.
    5355                 :            :  */
    5356                 :            : enum ice_status
    5357                 :          0 : ice_cfg_vsi_lan(struct ice_port_info *pi, u16 vsi_handle, u16 tc_bitmap,
    5358                 :            :                 u16 *max_lanqs)
    5359                 :            : {
    5360                 :          0 :         return ice_cfg_vsi_qs(pi, vsi_handle, tc_bitmap, max_lanqs,
    5361                 :            :                               ICE_SCHED_NODE_OWNER_LAN);
    5362                 :            : }
    5363                 :            : 
    5364                 :            : /**
    5365                 :            :  * ice_aq_get_sensor_reading
    5366                 :            :  * @hw: pointer to the HW struct
    5367                 :            :  * @sensor: sensor type
    5368                 :            :  * @format: requested response format
    5369                 :            :  * @data: pointer to data to be read from the sensor
    5370                 :            :  * @cd: pointer to command details structure or NULL
    5371                 :            :  *
    5372                 :            :  * Get sensor reading (0x0632)
    5373                 :            :  */
    5374                 :            : enum ice_status
    5375                 :          0 : ice_aq_get_sensor_reading(struct ice_hw *hw, u8 sensor, u8 format,
    5376                 :            :                           struct ice_aqc_get_sensor_reading_resp *data,
    5377                 :            :                           struct ice_sq_cd *cd)
    5378                 :            : {
    5379                 :            :         struct ice_aqc_get_sensor_reading *cmd;
    5380                 :            :         struct ice_aq_desc desc;
    5381                 :            :         enum ice_status status;
    5382                 :            : 
    5383         [ #  # ]:          0 :         if (!data)
    5384                 :            :                 return ICE_ERR_PARAM;
    5385                 :            : 
    5386                 :          0 :         ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_get_sensor_reading);
    5387                 :            :         cmd = &desc.params.get_sensor_reading;
    5388                 :          0 :         cmd->sensor = sensor;
    5389                 :          0 :         cmd->format = format;
    5390                 :            : 
    5391                 :          0 :         status = ice_aq_send_cmd(hw, &desc, NULL, 0, cd);
    5392                 :            : 
    5393         [ #  # ]:          0 :         if (!status)
    5394                 :            :                 ice_memcpy(data, &desc.params.get_sensor_reading_resp,
    5395                 :            :                            sizeof(*data), ICE_NONDMA_TO_NONDMA);
    5396                 :            : 
    5397                 :            :         return status;
    5398                 :            : }
    5399                 :            : 
    5400                 :            : /**
    5401                 :            :  * ice_is_main_vsi - checks whether the VSI is main VSI
    5402                 :            :  * @hw: pointer to the HW struct
    5403                 :            :  * @vsi_handle: VSI handle
    5404                 :            :  *
    5405                 :            :  * Checks whether the VSI is the main VSI (the first PF VSI created on
    5406                 :            :  * given PF).
    5407                 :            :  */
    5408                 :            : static bool ice_is_main_vsi(struct ice_hw *hw, u16 vsi_handle)
    5409                 :            : {
    5410   [ #  #  #  # ]:          0 :         return vsi_handle == ICE_MAIN_VSI_HANDLE && hw->vsi_ctx[vsi_handle];
    5411                 :            : }
    5412                 :            : 
    5413                 :            : /**
    5414                 :            :  * ice_replay_pre_init - replay pre initialization
    5415                 :            :  * @hw: pointer to the HW struct
    5416                 :            :  * @sw: pointer to switch info struct for which function initializes filters
    5417                 :            :  *
    5418                 :            :  * Initializes required config data for VSI, FD, ACL, and RSS before replay.
    5419                 :            :  */
    5420                 :            : enum ice_status
    5421                 :          0 : ice_replay_pre_init(struct ice_hw *hw, struct ice_switch_info *sw)
    5422                 :            : {
    5423                 :            :         enum ice_status status;
    5424                 :            :         u8 i;
    5425                 :            : 
    5426                 :            :         /* Delete old entries from replay filter list head if there is any */
    5427                 :          0 :         ice_rm_sw_replay_rule_info(hw, sw);
    5428                 :            :         /* In start of replay, move entries into replay_rules list, it
    5429                 :            :          * will allow adding rules entries back to filt_rules list,
    5430                 :            :          * which is operational list.
    5431                 :            :          */
    5432         [ #  # ]:          0 :         for (i = 0; i < ICE_MAX_NUM_RECIPES; i++)
    5433                 :          0 :                 LIST_REPLACE_INIT(&sw->recp_list[i].filt_rules,
    5434                 :            :                                   &sw->recp_list[i].filt_replay_rules);
    5435                 :          0 :         ice_sched_replay_agg_vsi_preinit(hw);
    5436                 :            : 
    5437                 :          0 :         status = ice_sched_replay_root_node_bw(hw->port_info);
    5438         [ #  # ]:          0 :         if (status)
    5439                 :            :                 return status;
    5440                 :            : 
    5441                 :          0 :         return ice_sched_replay_tc_node_bw(hw->port_info);
    5442                 :            : }
    5443                 :            : 
    5444                 :            : /**
    5445                 :            :  * ice_replay_vsi - replay VSI configuration
    5446                 :            :  * @hw: pointer to the HW struct
    5447                 :            :  * @vsi_handle: driver VSI handle
    5448                 :            :  *
    5449                 :            :  * Restore all VSI configuration after reset. It is required to call this
    5450                 :            :  * function with main VSI first.
    5451                 :            :  */
    5452                 :          0 : enum ice_status ice_replay_vsi(struct ice_hw *hw, u16 vsi_handle)
    5453                 :            : {
    5454                 :          0 :         struct ice_switch_info *sw = hw->switch_info;
    5455                 :          0 :         struct ice_port_info *pi = hw->port_info;
    5456                 :            :         enum ice_status status;
    5457                 :            : 
    5458         [ #  # ]:          0 :         if (!ice_is_vsi_valid(hw, vsi_handle))
    5459                 :            :                 return ICE_ERR_PARAM;
    5460                 :            : 
    5461                 :            :         /* Replay pre-initialization if there is any */
    5462         [ #  # ]:          0 :         if (ice_is_main_vsi(hw, vsi_handle)) {
    5463                 :          0 :                 status = ice_replay_pre_init(hw, sw);
    5464         [ #  # ]:          0 :                 if (status)
    5465                 :            :                         return status;
    5466                 :            :         }
    5467                 :            :         /* Replay per VSI all RSS configurations */
    5468                 :          0 :         status = ice_replay_rss_cfg(hw, vsi_handle);
    5469         [ #  # ]:          0 :         if (status)
    5470                 :            :                 return status;
    5471                 :            :         /* Replay per VSI all filters */
    5472                 :          0 :         status = ice_replay_vsi_all_fltr(hw, pi, vsi_handle);
    5473         [ #  # ]:          0 :         if (!status)
    5474                 :          0 :                 status = ice_replay_vsi_agg(hw, vsi_handle);
    5475                 :            :         return status;
    5476                 :            : }
    5477                 :            : 
    5478                 :            : /**
    5479                 :            :  * ice_replay_post - post replay configuration cleanup
    5480                 :            :  * @hw: pointer to the HW struct
    5481                 :            :  *
    5482                 :            :  * Post replay cleanup.
    5483                 :            :  */
    5484                 :          0 : void ice_replay_post(struct ice_hw *hw)
    5485                 :            : {
    5486                 :            :         /* Delete old entries from replay filter list head */
    5487                 :          0 :         ice_rm_all_sw_replay_rule_info(hw);
    5488                 :          0 :         ice_sched_replay_agg(hw);
    5489                 :          0 : }
    5490                 :            : 
    5491                 :            : /**
    5492                 :            :  * ice_stat_update40 - read 40 bit stat from the chip and update stat values
    5493                 :            :  * @hw: ptr to the hardware info
    5494                 :            :  * @reg: offset of 64 bit HW register to read from
    5495                 :            :  * @prev_stat_loaded: bool to specify if previous stats are loaded
    5496                 :            :  * @prev_stat: ptr to previous loaded stat value
    5497                 :            :  * @cur_stat: ptr to current stat value
    5498                 :            :  */
    5499                 :            : void
    5500                 :          0 : ice_stat_update40(struct ice_hw *hw, u32 reg, bool prev_stat_loaded,
    5501                 :            :                   u64 *prev_stat, u64 *cur_stat)
    5502                 :            : {
    5503                 :          0 :         u64 new_data = rd64(hw, reg) & (BIT_ULL(40) - 1);
    5504                 :            : 
    5505                 :            :         /* device stats are not reset at PFR, they likely will not be zeroed
    5506                 :            :          * when the driver starts. Thus, save the value from the first read
    5507                 :            :          * without adding to the statistic value so that we report stats which
    5508                 :            :          * count up from zero.
    5509                 :            :          */
    5510         [ #  # ]:          0 :         if (!prev_stat_loaded) {
    5511                 :          0 :                 *prev_stat = new_data;
    5512                 :          0 :                 return;
    5513                 :            :         }
    5514                 :            : 
    5515                 :            :         /* Calculate the difference between the new and old values, and then
    5516                 :            :          * add it to the software stat value.
    5517                 :            :          */
    5518         [ #  # ]:          0 :         if (new_data >= *prev_stat)
    5519                 :          0 :                 *cur_stat += new_data - *prev_stat;
    5520                 :            :         else
    5521                 :            :                 /* to manage the potential roll-over */
    5522                 :          0 :                 *cur_stat += (new_data + BIT_ULL(40)) - *prev_stat;
    5523                 :            : 
    5524                 :            :         /* Update the previously stored value to prepare for next read */
    5525                 :          0 :         *prev_stat = new_data;
    5526                 :            : }
    5527                 :            : 
    5528                 :            : /**
    5529                 :            :  * ice_stat_update32 - read 32 bit stat from the chip and update stat values
    5530                 :            :  * @hw: ptr to the hardware info
    5531                 :            :  * @reg: offset of HW register to read from
    5532                 :            :  * @prev_stat_loaded: bool to specify if previous stats are loaded
    5533                 :            :  * @prev_stat: ptr to previous loaded stat value
    5534                 :            :  * @cur_stat: ptr to current stat value
    5535                 :            :  */
    5536                 :            : void
    5537                 :          0 : ice_stat_update32(struct ice_hw *hw, u32 reg, bool prev_stat_loaded,
    5538                 :            :                   u64 *prev_stat, u64 *cur_stat)
    5539                 :            : {
    5540                 :            :         u32 new_data;
    5541                 :            : 
    5542                 :          0 :         new_data = rd32(hw, reg);
    5543                 :            : 
    5544                 :            :         /* device stats are not reset at PFR, they likely will not be zeroed
    5545                 :            :          * when the driver starts. Thus, save the value from the first read
    5546                 :            :          * without adding to the statistic value so that we report stats which
    5547                 :            :          * count up from zero.
    5548                 :            :          */
    5549         [ #  # ]:          0 :         if (!prev_stat_loaded) {
    5550                 :          0 :                 *prev_stat = new_data;
    5551                 :          0 :                 return;
    5552                 :            :         }
    5553                 :            : 
    5554                 :            :         /* Calculate the difference between the new and old values, and then
    5555                 :            :          * add it to the software stat value.
    5556                 :            :          */
    5557         [ #  # ]:          0 :         if (new_data >= *prev_stat)
    5558                 :          0 :                 *cur_stat += new_data - *prev_stat;
    5559                 :            :         else
    5560                 :            :                 /* to manage the potential roll-over */
    5561                 :          0 :                 *cur_stat += (new_data + BIT_ULL(32)) - *prev_stat;
    5562                 :            : 
    5563                 :            :         /* Update the previously stored value to prepare for next read */
    5564                 :          0 :         *prev_stat = new_data;
    5565                 :            : }
    5566                 :            : 
    5567                 :            : /**
    5568                 :            :  * ice_stat_update_repc - read GLV_REPC stats from chip and update stat values
    5569                 :            :  * @hw: ptr to the hardware info
    5570                 :            :  * @vsi_handle: VSI handle
    5571                 :            :  * @prev_stat_loaded: bool to specify if the previous stat values are loaded
    5572                 :            :  * @cur_stats: ptr to current stats structure
    5573                 :            :  *
    5574                 :            :  * The GLV_REPC statistic register actually tracks two 16bit statistics, and
    5575                 :            :  * thus cannot be read using the normal ice_stat_update32 function.
    5576                 :            :  *
    5577                 :            :  * Read the GLV_REPC register associated with the given VSI, and update the
    5578                 :            :  * rx_no_desc and rx_error values in the ice_eth_stats structure.
    5579                 :            :  *
    5580                 :            :  * Because the statistics in GLV_REPC stick at 0xFFFF, the register must be
    5581                 :            :  * cleared each time it's read.
    5582                 :            :  *
    5583                 :            :  * Note that the GLV_RDPC register also counts the causes that would trigger
    5584                 :            :  * GLV_REPC. However, it does not give the finer grained detail about why the
    5585                 :            :  * packets are being dropped. The GLV_REPC values can be used to distinguish
    5586                 :            :  * whether Rx packets are dropped due to errors or due to no available
    5587                 :            :  * descriptors.
    5588                 :            :  */
    5589                 :            : void
    5590                 :          0 : ice_stat_update_repc(struct ice_hw *hw, u16 vsi_handle, bool prev_stat_loaded,
    5591                 :            :                      struct ice_eth_stats *cur_stats)
    5592                 :            : {
    5593                 :            :         u16 vsi_num, no_desc, error_cnt;
    5594                 :            :         u32 repc;
    5595                 :            : 
    5596         [ #  # ]:          0 :         if (!ice_is_vsi_valid(hw, vsi_handle))
    5597                 :            :                 return;
    5598                 :            : 
    5599                 :          0 :         vsi_num = ice_get_hw_vsi_num(hw, vsi_handle);
    5600                 :            : 
    5601                 :            :         /* If we haven't loaded stats yet, just clear the current value */
    5602         [ #  # ]:          0 :         if (!prev_stat_loaded) {
    5603                 :          0 :                 wr32(hw, GLV_REPC(vsi_num), 0);
    5604                 :          0 :                 return;
    5605                 :            :         }
    5606                 :            : 
    5607                 :          0 :         repc = rd32(hw, GLV_REPC(vsi_num));
    5608                 :          0 :         no_desc = (repc & GLV_REPC_NO_DESC_CNT_M) >> GLV_REPC_NO_DESC_CNT_S;
    5609                 :          0 :         error_cnt = (repc & GLV_REPC_ERROR_CNT_M) >> GLV_REPC_ERROR_CNT_S;
    5610                 :            : 
    5611                 :            :         /* Clear the count by writing to the stats register */
    5612                 :          0 :         wr32(hw, GLV_REPC(vsi_num), 0);
    5613                 :            : 
    5614                 :          0 :         cur_stats->rx_no_desc += no_desc;
    5615                 :          0 :         cur_stats->rx_errors += error_cnt;
    5616                 :            : }
    5617                 :            : 
    5618                 :            : /**
    5619                 :            :  * ice_sched_query_elem - query element information from HW
    5620                 :            :  * @hw: pointer to the HW struct
    5621                 :            :  * @node_teid: node TEID to be queried
    5622                 :            :  * @buf: buffer to element information
    5623                 :            :  *
    5624                 :            :  * This function queries HW element information
    5625                 :            :  */
    5626                 :            : enum ice_status
    5627                 :          0 : ice_sched_query_elem(struct ice_hw *hw, u32 node_teid,
    5628                 :            :                      struct ice_aqc_txsched_elem_data *buf)
    5629                 :            : {
    5630                 :          0 :         u16 buf_size, num_elem_ret = 0;
    5631                 :            :         enum ice_status status;
    5632                 :            : 
    5633                 :            :         buf_size = sizeof(*buf);
    5634                 :            :         ice_memset(buf, 0, buf_size, ICE_NONDMA_MEM);
    5635                 :          0 :         buf->node_teid = CPU_TO_LE32(node_teid);
    5636                 :          0 :         status = ice_aq_query_sched_elems(hw, 1, buf, buf_size, &num_elem_ret,
    5637                 :            :                                           NULL);
    5638   [ #  #  #  # ]:          0 :         if (status != ICE_SUCCESS || num_elem_ret != 1)
    5639         [ #  # ]:          0 :                 ice_debug(hw, ICE_DBG_SCHED, "query element failed\n");
    5640                 :          0 :         return status;
    5641                 :            : }
    5642                 :            : 
    5643                 :            : /**
    5644                 :            :  * ice_get_fw_mode - returns FW mode
    5645                 :            :  * @hw: pointer to the HW struct
    5646                 :            :  */
    5647                 :          0 : enum ice_fw_modes ice_get_fw_mode(struct ice_hw *hw)
    5648                 :            : {
    5649                 :            : #define ICE_FW_MODE_DBG_M BIT(0)
    5650                 :            : #define ICE_FW_MODE_REC_M BIT(1)
    5651                 :            : #define ICE_FW_MODE_ROLLBACK_M BIT(2)
    5652                 :            :         u32 fw_mode;
    5653                 :            : 
    5654                 :            :         /* check the current FW mode */
    5655                 :          0 :         fw_mode = rd32(hw, GL_MNG_FWSM) & GL_MNG_FWSM_FW_MODES_M;
    5656                 :            : 
    5657         [ #  # ]:          0 :         if (fw_mode & ICE_FW_MODE_DBG_M)
    5658                 :            :                 return ICE_FW_MODE_DBG;
    5659         [ #  # ]:          0 :         else if (fw_mode & ICE_FW_MODE_REC_M)
    5660                 :            :                 return ICE_FW_MODE_REC;
    5661         [ #  # ]:          0 :         else if (fw_mode & ICE_FW_MODE_ROLLBACK_M)
    5662                 :            :                 return ICE_FW_MODE_ROLLBACK;
    5663                 :            :         else
    5664                 :          0 :                 return ICE_FW_MODE_NORMAL;
    5665                 :            : }
    5666                 :            : 
    5667                 :            : /**
    5668                 :            :  * ice_aq_read_i2c
    5669                 :            :  * @hw: pointer to the hw struct
    5670                 :            :  * @topo_addr: topology address for a device to communicate with
    5671                 :            :  * @bus_addr: 7-bit I2C bus address
    5672                 :            :  * @addr: I2C memory address (I2C offset) with up to 16 bits
    5673                 :            :  * @params: I2C parameters: bit [7] - Repeated start, bits [6:5] data offset size,
    5674                 :            :  *                          bit [4] - I2C address type, bits [3:0] - data size to read (0-16 bytes)
    5675                 :            :  * @data: pointer to data (0 to 16 bytes) to be read from the I2C device
    5676                 :            :  * @cd: pointer to command details structure or NULL
    5677                 :            :  *
    5678                 :            :  * Read I2C (0x06E2)
    5679                 :            :  */
    5680                 :            : enum ice_status
    5681                 :          0 : ice_aq_read_i2c(struct ice_hw *hw, struct ice_aqc_link_topo_addr topo_addr,
    5682                 :            :                 u16 bus_addr, __le16 addr, u8 params, u8 *data,
    5683                 :            :                 struct ice_sq_cd *cd)
    5684                 :            : {
    5685                 :          0 :         struct ice_aq_desc desc = { 0 };
    5686                 :            :         struct ice_aqc_i2c *cmd;
    5687                 :            :         enum ice_status status;
    5688                 :            :         u8 data_size;
    5689                 :            : 
    5690                 :          0 :         ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_read_i2c);
    5691                 :            :         cmd = &desc.params.read_write_i2c;
    5692                 :            : 
    5693         [ #  # ]:          0 :         if (!data)
    5694                 :            :                 return ICE_ERR_PARAM;
    5695                 :            : 
    5696                 :          0 :         data_size = (params & ICE_AQC_I2C_DATA_SIZE_M) >> ICE_AQC_I2C_DATA_SIZE_S;
    5697                 :            : 
    5698                 :          0 :         cmd->i2c_bus_addr = CPU_TO_LE16(bus_addr);
    5699                 :          0 :         cmd->topo_addr = topo_addr;
    5700                 :          0 :         cmd->i2c_params = params;
    5701                 :          0 :         cmd->i2c_addr = addr;
    5702                 :            : 
    5703                 :          0 :         status = ice_aq_send_cmd(hw, &desc, NULL, 0, cd);
    5704         [ #  # ]:          0 :         if (!status) {
    5705                 :            :                 struct ice_aqc_read_i2c_resp *resp;
    5706                 :            :                 u8 i;
    5707                 :            : 
    5708                 :            :                 resp = &desc.params.read_i2c_resp;
    5709         [ #  # ]:          0 :                 for (i = 0; i < data_size; i++) {
    5710                 :          0 :                         *data = resp->i2c_data[i];
    5711                 :          0 :                         data++;
    5712                 :            :                 }
    5713                 :            :         }
    5714                 :            : 
    5715                 :            :         return status;
    5716                 :            : }
    5717                 :            : 
    5718                 :            : /**
    5719                 :            :  * ice_aq_write_i2c
    5720                 :            :  * @hw: pointer to the hw struct
    5721                 :            :  * @topo_addr: topology address for a device to communicate with
    5722                 :            :  * @bus_addr: 7-bit I2C bus address
    5723                 :            :  * @addr: I2C memory address (I2C offset) with up to 16 bits
    5724                 :            :  * @params: I2C parameters: bit [4] - I2C address type, bits [3:0] - data size to write (0-7 bytes)
    5725                 :            :  * @data: pointer to data (0 to 4 bytes) to be written to the I2C device
    5726                 :            :  * @cd: pointer to command details structure or NULL
    5727                 :            :  *
    5728                 :            :  * Write I2C (0x06E3)
    5729                 :            :  */
    5730                 :            : enum ice_status
    5731                 :          0 : ice_aq_write_i2c(struct ice_hw *hw, struct ice_aqc_link_topo_addr topo_addr,
    5732                 :            :                  u16 bus_addr, __le16 addr, u8 params, u8 *data,
    5733                 :            :                  struct ice_sq_cd *cd)
    5734                 :            : {
    5735                 :          0 :         struct ice_aq_desc desc = { 0 };
    5736                 :            :         struct ice_aqc_i2c *cmd;
    5737                 :            :         u8 i, data_size;
    5738                 :            : 
    5739                 :          0 :         ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_write_i2c);
    5740                 :            :         cmd = &desc.params.read_write_i2c;
    5741                 :            : 
    5742                 :          0 :         data_size = (params & ICE_AQC_I2C_DATA_SIZE_M) >> ICE_AQC_I2C_DATA_SIZE_S;
    5743                 :            : 
    5744                 :            :         /* data_size limited to 4 */
    5745         [ #  # ]:          0 :         if (data_size > 4)
    5746                 :            :                 return ICE_ERR_PARAM;
    5747                 :            : 
    5748                 :          0 :         cmd->i2c_bus_addr = CPU_TO_LE16(bus_addr);
    5749                 :          0 :         cmd->topo_addr = topo_addr;
    5750                 :          0 :         cmd->i2c_params = params;
    5751                 :          0 :         cmd->i2c_addr = addr;
    5752                 :            : 
    5753         [ #  # ]:          0 :         for (i = 0; i < data_size; i++) {
    5754                 :          0 :                 cmd->i2c_data[i] = *data;
    5755                 :          0 :                 data++;
    5756                 :            :         }
    5757                 :            : 
    5758                 :          0 :         return ice_aq_send_cmd(hw, &desc, NULL, 0, cd);
    5759                 :            : }
    5760                 :            : 
    5761                 :            : /**
    5762                 :            :  * ice_aq_set_driver_param - Set driver parameter to share via firmware
    5763                 :            :  * @hw: pointer to the HW struct
    5764                 :            :  * @idx: parameter index to set
    5765                 :            :  * @value: the value to set the parameter to
    5766                 :            :  * @cd: pointer to command details structure or NULL
    5767                 :            :  *
    5768                 :            :  * Set the value of one of the software defined parameters. All PFs connected
    5769                 :            :  * to this device can read the value using ice_aq_get_driver_param.
    5770                 :            :  *
    5771                 :            :  * Note that firmware provides no synchronization or locking, and will not
    5772                 :            :  * save the parameter value during a device reset. It is expected that
    5773                 :            :  * a single PF will write the parameter value, while all other PFs will only
    5774                 :            :  * read it.
    5775                 :            :  */
    5776                 :            : enum ice_status
    5777                 :          0 : ice_aq_set_driver_param(struct ice_hw *hw, enum ice_aqc_driver_params idx,
    5778                 :            :                         u32 value, struct ice_sq_cd *cd)
    5779                 :            : {
    5780                 :            :         struct ice_aqc_driver_shared_params *cmd;
    5781                 :            :         struct ice_aq_desc desc;
    5782                 :            : 
    5783         [ #  # ]:          0 :         if (idx >= ICE_AQC_DRIVER_PARAM_MAX)
    5784                 :            :                 return ICE_ERR_OUT_OF_RANGE;
    5785                 :            : 
    5786                 :            :         cmd = &desc.params.drv_shared_params;
    5787                 :            : 
    5788                 :          0 :         ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_driver_shared_params);
    5789                 :            : 
    5790                 :          0 :         cmd->set_or_get_op = ICE_AQC_DRIVER_PARAM_SET;
    5791                 :          0 :         cmd->param_indx = (u8)idx;
    5792                 :          0 :         cmd->param_val = CPU_TO_LE32(value);
    5793                 :            : 
    5794                 :          0 :         return ice_aq_send_cmd(hw, &desc, NULL, 0, cd);
    5795                 :            : }
    5796                 :            : 
    5797                 :            : /**
    5798                 :            :  * ice_aq_get_driver_param - Get driver parameter shared via firmware
    5799                 :            :  * @hw: pointer to the HW struct
    5800                 :            :  * @idx: parameter index to set
    5801                 :            :  * @value: storage to return the shared parameter
    5802                 :            :  * @cd: pointer to command details structure or NULL
    5803                 :            :  *
    5804                 :            :  * Get the value of one of the software defined parameters.
    5805                 :            :  *
    5806                 :            :  * Note that firmware provides no synchronization or locking. It is expected
    5807                 :            :  * that only a single PF will write a given parameter.
    5808                 :            :  */
    5809                 :            : enum ice_status
    5810                 :          0 : ice_aq_get_driver_param(struct ice_hw *hw, enum ice_aqc_driver_params idx,
    5811                 :            :                         u32 *value, struct ice_sq_cd *cd)
    5812                 :            : {
    5813                 :            :         struct ice_aqc_driver_shared_params *cmd;
    5814                 :            :         struct ice_aq_desc desc;
    5815                 :            :         enum ice_status status;
    5816                 :            : 
    5817         [ #  # ]:          0 :         if (idx >= ICE_AQC_DRIVER_PARAM_MAX)
    5818                 :            :                 return ICE_ERR_OUT_OF_RANGE;
    5819                 :            : 
    5820                 :            :         cmd = &desc.params.drv_shared_params;
    5821                 :            : 
    5822                 :          0 :         ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_driver_shared_params);
    5823                 :            : 
    5824                 :          0 :         cmd->set_or_get_op = ICE_AQC_DRIVER_PARAM_GET;
    5825                 :          0 :         cmd->param_indx = (u8)idx;
    5826                 :            : 
    5827                 :          0 :         status = ice_aq_send_cmd(hw, &desc, NULL, 0, cd);
    5828         [ #  # ]:          0 :         if (status)
    5829                 :            :                 return status;
    5830                 :            : 
    5831                 :          0 :         *value = LE32_TO_CPU(cmd->param_val);
    5832                 :            : 
    5833                 :          0 :         return ICE_SUCCESS;
    5834                 :            : }
    5835                 :            : 
    5836                 :            : /**
    5837                 :            :  * ice_aq_set_gpio
    5838                 :            :  * @hw: pointer to the hw struct
    5839                 :            :  * @gpio_ctrl_handle: GPIO controller node handle
    5840                 :            :  * @pin_idx: IO Number of the GPIO that needs to be set
    5841                 :            :  * @value: SW provide IO value to set in the LSB
    5842                 :            :  * @cd: pointer to command details structure or NULL
    5843                 :            :  *
    5844                 :            :  * Sends 0x06EC AQ command to set the GPIO pin state that's part of the topology
    5845                 :            :  */
    5846                 :            : enum ice_status
    5847                 :          0 : ice_aq_set_gpio(struct ice_hw *hw, u16 gpio_ctrl_handle, u8 pin_idx, bool value,
    5848                 :            :                 struct ice_sq_cd *cd)
    5849                 :            : {
    5850                 :            :         struct ice_aqc_gpio *cmd;
    5851                 :            :         struct ice_aq_desc desc;
    5852                 :            : 
    5853                 :          0 :         ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_set_gpio);
    5854                 :            :         cmd = &desc.params.read_write_gpio;
    5855                 :          0 :         cmd->gpio_ctrl_handle = CPU_TO_LE16(gpio_ctrl_handle);
    5856                 :          0 :         cmd->gpio_num = pin_idx;
    5857                 :          0 :         cmd->gpio_val = value ? 1 : 0;
    5858                 :            : 
    5859                 :          0 :         return ice_aq_send_cmd(hw, &desc, NULL, 0, cd);
    5860                 :            : }
    5861                 :            : 
    5862                 :            : /**
    5863                 :            :  * ice_aq_get_gpio
    5864                 :            :  * @hw: pointer to the hw struct
    5865                 :            :  * @gpio_ctrl_handle: GPIO controller node handle
    5866                 :            :  * @pin_idx: IO Number of the GPIO that needs to be set
    5867                 :            :  * @value: IO value read
    5868                 :            :  * @cd: pointer to command details structure or NULL
    5869                 :            :  *
    5870                 :            :  * Sends 0x06ED AQ command to get the value of a GPIO signal which is part of
    5871                 :            :  * the topology
    5872                 :            :  */
    5873                 :            : enum ice_status
    5874                 :          0 : ice_aq_get_gpio(struct ice_hw *hw, u16 gpio_ctrl_handle, u8 pin_idx,
    5875                 :            :                 bool *value, struct ice_sq_cd *cd)
    5876                 :            : {
    5877                 :            :         struct ice_aqc_gpio *cmd;
    5878                 :            :         struct ice_aq_desc desc;
    5879                 :            :         enum ice_status status;
    5880                 :            : 
    5881                 :          0 :         ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_get_gpio);
    5882                 :            :         cmd = &desc.params.read_write_gpio;
    5883                 :          0 :         cmd->gpio_ctrl_handle = CPU_TO_LE16(gpio_ctrl_handle);
    5884                 :          0 :         cmd->gpio_num = pin_idx;
    5885                 :            : 
    5886                 :          0 :         status = ice_aq_send_cmd(hw, &desc, NULL, 0, cd);
    5887         [ #  # ]:          0 :         if (status)
    5888                 :            :                 return status;
    5889                 :            : 
    5890                 :          0 :         *value = !!cmd->gpio_val;
    5891                 :          0 :         return ICE_SUCCESS;
    5892                 :            : }
    5893                 :            : 
    5894                 :            : /**
    5895                 :            :  * ice_is_fw_api_min_ver
    5896                 :            :  * @hw: pointer to the hardware structure
    5897                 :            :  * @maj: major version
    5898                 :            :  * @min: minor version
    5899                 :            :  * @patch: patch version
    5900                 :            :  *
    5901                 :            :  * Checks if the firmware is minimum version
    5902                 :            :  */
    5903                 :            : static bool ice_is_fw_api_min_ver(struct ice_hw *hw, u8 maj, u8 min, u8 patch)
    5904                 :            : {
    5905         [ #  # ]:          0 :         if (hw->api_maj_ver == maj) {
    5906   [ #  #  #  #  :          0 :                 if (hw->api_min_ver > min)
                   #  # ]
    5907                 :            :                         return true;
    5908   [ #  #  #  #  :          0 :                 if (hw->api_min_ver == min && hw->api_patch >= patch)
          #  #  #  #  #  
                #  #  # ]
    5909                 :          0 :                         return true;
    5910   [ #  #  #  #  :          0 :         } else if (hw->api_maj_ver > maj) {
                   #  # ]
    5911                 :          0 :                 return true;
    5912                 :            :         }
    5913                 :            : 
    5914                 :            :         return false;
    5915                 :            : }
    5916                 :            : 
    5917                 :            : /**
    5918                 :            :  * ice_is_fw_min_ver
    5919                 :            :  * @hw: pointer to the hardware structure
    5920                 :            :  * @branch: branch version
    5921                 :            :  * @maj: major version
    5922                 :            :  * @min: minor version
    5923                 :            :  * @patch: patch version
    5924                 :            :  *
    5925                 :            :  * Checks if the firmware is minimum version
    5926                 :            :  */
    5927                 :            : static bool ice_is_fw_min_ver(struct ice_hw *hw, u8 branch, u8 maj, u8 min,
    5928                 :            :                               u8 patch)
    5929                 :            : {
    5930                 :          0 :         if (hw->fw_branch == branch) {
    5931         [ #  # ]:          0 :                 if (hw->fw_maj_ver > maj)
    5932                 :            :                         return true;
    5933         [ #  # ]:          0 :                 if (hw->fw_maj_ver == maj) {
    5934         [ #  # ]:          0 :                         if (hw->fw_min_ver > min)
    5935                 :            :                                 return true;
    5936         [ #  # ]:          0 :                         if (hw->fw_min_ver == min && hw->fw_patch >= patch)
    5937                 :          0 :                                 return true;
    5938                 :            :                 }
    5939         [ #  # ]:          0 :         } else if (hw->fw_branch > branch) {
    5940                 :          0 :                 return true;
    5941                 :            :         }
    5942                 :            : 
    5943                 :            :         return false;
    5944                 :            : }
    5945                 :            : 
    5946                 :            : /**
    5947                 :            :  * ice_fw_supports_link_override
    5948                 :            :  * @hw: pointer to the hardware structure
    5949                 :            :  *
    5950                 :            :  * Checks if the firmware supports link override
    5951                 :            :  */
    5952         [ #  # ]:          0 : bool ice_fw_supports_link_override(struct ice_hw *hw)
    5953                 :            : {
    5954                 :          0 :         return ice_is_fw_api_min_ver(hw, ICE_FW_API_LINK_OVERRIDE_MAJ,
    5955                 :            :                                      ICE_FW_API_LINK_OVERRIDE_MIN,
    5956                 :            :                                      ICE_FW_API_LINK_OVERRIDE_PATCH);
    5957                 :            : }
    5958                 :            : 
    5959                 :            : /**
    5960                 :            :  * ice_get_link_default_override
    5961                 :            :  * @ldo: pointer to the link default override struct
    5962                 :            :  * @pi: pointer to the port info struct
    5963                 :            :  *
    5964                 :            :  * Gets the link default override for a port
    5965                 :            :  */
    5966                 :            : enum ice_status
    5967                 :          0 : ice_get_link_default_override(struct ice_link_default_override_tlv *ldo,
    5968                 :            :                               struct ice_port_info *pi)
    5969                 :            : {
    5970                 :            :         u16 i, tlv, tlv_len, tlv_start, buf, offset;
    5971                 :          0 :         struct ice_hw *hw = pi->hw;
    5972                 :            :         enum ice_status status;
    5973                 :            : 
    5974                 :          0 :         status = ice_get_pfa_module_tlv(hw, &tlv, &tlv_len,
    5975                 :            :                                         ICE_SR_LINK_DEFAULT_OVERRIDE_PTR);
    5976         [ #  # ]:          0 :         if (status) {
    5977         [ #  # ]:          0 :                 ice_debug(hw, ICE_DBG_INIT, "Failed to read link override TLV.\n");
    5978                 :          0 :                 return status;
    5979                 :            :         }
    5980                 :            : 
    5981                 :            :         /* Each port has its own config; calculate for our port */
    5982                 :          0 :         tlv_start = tlv + pi->lport * ICE_SR_PFA_LINK_OVERRIDE_WORDS +
    5983                 :            :                 ICE_SR_PFA_LINK_OVERRIDE_OFFSET;
    5984                 :            : 
    5985                 :            :         /* link options first */
    5986                 :          0 :         status = ice_read_sr_word(hw, tlv_start, &buf);
    5987         [ #  # ]:          0 :         if (status) {
    5988         [ #  # ]:          0 :                 ice_debug(hw, ICE_DBG_INIT, "Failed to read override link options.\n");
    5989                 :          0 :                 return status;
    5990                 :            :         }
    5991                 :          0 :         ldo->options = buf & ICE_LINK_OVERRIDE_OPT_M;
    5992                 :          0 :         ldo->phy_config = (buf & ICE_LINK_OVERRIDE_PHY_CFG_M) >>
    5993                 :            :                 ICE_LINK_OVERRIDE_PHY_CFG_S;
    5994                 :            : 
    5995                 :            :         /* link PHY config */
    5996                 :          0 :         offset = tlv_start + ICE_SR_PFA_LINK_OVERRIDE_FEC_OFFSET;
    5997                 :          0 :         status = ice_read_sr_word(hw, offset, &buf);
    5998         [ #  # ]:          0 :         if (status) {
    5999         [ #  # ]:          0 :                 ice_debug(hw, ICE_DBG_INIT, "Failed to read override phy config.\n");
    6000                 :          0 :                 return status;
    6001                 :            :         }
    6002                 :          0 :         ldo->fec_options = buf & ICE_LINK_OVERRIDE_FEC_OPT_M;
    6003                 :            : 
    6004                 :            :         /* PHY types low */
    6005                 :          0 :         offset = tlv_start + ICE_SR_PFA_LINK_OVERRIDE_PHY_OFFSET;
    6006         [ #  # ]:          0 :         for (i = 0; i < ICE_SR_PFA_LINK_OVERRIDE_PHY_WORDS; i++) {
    6007                 :          0 :                 status = ice_read_sr_word(hw, (offset + i), &buf);
    6008         [ #  # ]:          0 :                 if (status) {
    6009         [ #  # ]:          0 :                         ice_debug(hw, ICE_DBG_INIT, "Failed to read override link options.\n");
    6010                 :          0 :                         return status;
    6011                 :            :                 }
    6012                 :            :                 /* shift 16 bits at a time to fill 64 bits */
    6013                 :          0 :                 ldo->phy_type_low |= ((u64)buf << (i * 16));
    6014                 :            :         }
    6015                 :            : 
    6016                 :            :         /* PHY types high */
    6017                 :          0 :         offset = tlv_start + ICE_SR_PFA_LINK_OVERRIDE_PHY_OFFSET +
    6018                 :            :                 ICE_SR_PFA_LINK_OVERRIDE_PHY_WORDS;
    6019         [ #  # ]:          0 :         for (i = 0; i < ICE_SR_PFA_LINK_OVERRIDE_PHY_WORDS; i++) {
    6020                 :          0 :                 status = ice_read_sr_word(hw, (offset + i), &buf);
    6021         [ #  # ]:          0 :                 if (status) {
    6022         [ #  # ]:          0 :                         ice_debug(hw, ICE_DBG_INIT, "Failed to read override link options.\n");
    6023                 :          0 :                         return status;
    6024                 :            :                 }
    6025                 :            :                 /* shift 16 bits at a time to fill 64 bits */
    6026                 :          0 :                 ldo->phy_type_high |= ((u64)buf << (i * 16));
    6027                 :            :         }
    6028                 :            : 
    6029                 :            :         return status;
    6030                 :            : }
    6031                 :            : 
    6032                 :            : /**
    6033                 :            :  * ice_is_phy_caps_an_enabled - check if PHY capabilities autoneg is enabled
    6034                 :            :  * @caps: get PHY capability data
    6035                 :            :  */
    6036                 :          0 : bool ice_is_phy_caps_an_enabled(struct ice_aqc_get_phy_caps_data *caps)
    6037                 :            : {
    6038         [ #  # ]:          0 :         if (caps->caps & ICE_AQC_PHY_AN_MODE ||
    6039         [ #  # ]:          0 :             caps->low_power_ctrl_an & (ICE_AQC_PHY_AN_EN_CLAUSE28 |
    6040                 :            :                                        ICE_AQC_PHY_AN_EN_CLAUSE73 |
    6041                 :            :                                        ICE_AQC_PHY_AN_EN_CLAUSE37))
    6042                 :          0 :                 return true;
    6043                 :            : 
    6044                 :            :         return false;
    6045                 :            : }
    6046                 :            : 
    6047                 :            : /**
    6048                 :            :  * ice_aq_set_lldp_mib - Set the LLDP MIB
    6049                 :            :  * @hw: pointer to the HW struct
    6050                 :            :  * @mib_type: Local, Remote or both Local and Remote MIBs
    6051                 :            :  * @buf: pointer to the caller-supplied buffer to store the MIB block
    6052                 :            :  * @buf_size: size of the buffer (in bytes)
    6053                 :            :  * @cd: pointer to command details structure or NULL
    6054                 :            :  *
    6055                 :            :  * Set the LLDP MIB. (0x0A08)
    6056                 :            :  */
    6057                 :            : enum ice_status
    6058                 :          0 : ice_aq_set_lldp_mib(struct ice_hw *hw, u8 mib_type, void *buf, u16 buf_size,
    6059                 :            :                     struct ice_sq_cd *cd)
    6060                 :            : {
    6061                 :            :         struct ice_aqc_lldp_set_local_mib *cmd;
    6062                 :            :         struct ice_aq_desc desc;
    6063                 :            : 
    6064                 :            :         cmd = &desc.params.lldp_set_mib;
    6065                 :            : 
    6066         [ #  # ]:          0 :         if (buf_size == 0 || !buf)
    6067                 :            :                 return ICE_ERR_PARAM;
    6068                 :            : 
    6069                 :          0 :         ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_lldp_set_local_mib);
    6070                 :            : 
    6071                 :          0 :         desc.flags |= CPU_TO_LE16((u16)ICE_AQ_FLAG_RD);
    6072                 :          0 :         desc.datalen = CPU_TO_LE16(buf_size);
    6073                 :            : 
    6074                 :          0 :         cmd->type = mib_type;
    6075                 :          0 :         cmd->length = CPU_TO_LE16(buf_size);
    6076                 :            : 
    6077                 :          0 :         return ice_aq_send_cmd(hw, &desc, buf, buf_size, cd);
    6078                 :            : }
    6079                 :            : 
    6080                 :            : /**
    6081                 :            :  * ice_fw_supports_lldp_fltr_ctrl - check NVM version supports lldp_fltr_ctrl
    6082                 :            :  * @hw: pointer to HW struct
    6083                 :            :  */
    6084                 :          0 : bool ice_fw_supports_lldp_fltr_ctrl(struct ice_hw *hw)
    6085                 :            : {
    6086         [ #  # ]:          0 :         if (hw->mac_type != ICE_MAC_E810 && hw->mac_type != ICE_MAC_GENERIC)
    6087                 :            :                 return false;
    6088                 :            : 
    6089                 :            :         return ice_is_fw_api_min_ver(hw, ICE_FW_API_LLDP_FLTR_MAJ,
    6090                 :            :                                      ICE_FW_API_LLDP_FLTR_MIN,
    6091                 :            :                                      ICE_FW_API_LLDP_FLTR_PATCH);
    6092                 :            : }
    6093                 :            : 
    6094                 :            : /**
    6095                 :            :  * ice_lldp_fltr_add_remove - add or remove a LLDP Rx switch filter
    6096                 :            :  * @hw: pointer to HW struct
    6097                 :            :  * @vsi_num: absolute HW index for VSI
    6098                 :            :  * @add: boolean for if adding or removing a filter
    6099                 :            :  */
    6100                 :            : enum ice_status
    6101                 :          0 : ice_lldp_fltr_add_remove(struct ice_hw *hw, u16 vsi_num, bool add)
    6102                 :            : {
    6103                 :            :         struct ice_aqc_lldp_filter_ctrl *cmd;
    6104                 :            :         struct ice_aq_desc desc;
    6105                 :            : 
    6106                 :            :         cmd = &desc.params.lldp_filter_ctrl;
    6107                 :            : 
    6108                 :          0 :         ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_lldp_filter_ctrl);
    6109                 :            : 
    6110         [ #  # ]:          0 :         if (add)
    6111                 :          0 :                 cmd->cmd_flags = ICE_AQC_LLDP_FILTER_ACTION_ADD;
    6112                 :            :         else
    6113                 :          0 :                 cmd->cmd_flags = ICE_AQC_LLDP_FILTER_ACTION_DELETE;
    6114                 :            : 
    6115                 :          0 :         cmd->vsi_num = CPU_TO_LE16(vsi_num);
    6116                 :            : 
    6117                 :          0 :         return ice_aq_send_cmd(hw, &desc, NULL, 0, NULL);
    6118                 :            : }
    6119                 :            : 
    6120                 :            : /**
    6121                 :            :  * ice_lldp_execute_pending_mib - execute LLDP pending MIB request
    6122                 :            :  * @hw: pointer to HW struct
    6123                 :            :  */
    6124                 :          0 : enum ice_status ice_lldp_execute_pending_mib(struct ice_hw *hw)
    6125                 :            : {
    6126                 :            :         struct ice_aq_desc desc;
    6127                 :            : 
    6128                 :          0 :         ice_fill_dflt_direct_cmd_desc(&desc, ice_execute_pending_lldp_mib);
    6129                 :            : 
    6130                 :          0 :         return ice_aq_send_cmd(hw, &desc, NULL, 0, NULL);
    6131                 :            : }
    6132                 :            : 
    6133                 :            : /**
    6134                 :            :  * ice_fw_supports_report_dflt_cfg
    6135                 :            :  * @hw: pointer to the hardware structure
    6136                 :            :  *
    6137                 :            :  * Checks if the firmware supports report default configuration
    6138                 :            :  */
    6139         [ #  # ]:          0 : bool ice_fw_supports_report_dflt_cfg(struct ice_hw *hw)
    6140                 :            : {
    6141                 :          0 :         return ice_is_fw_api_min_ver(hw, ICE_FW_API_REPORT_DFLT_CFG_MAJ,
    6142                 :            :                                      ICE_FW_API_REPORT_DFLT_CFG_MIN,
    6143                 :            :                                      ICE_FW_API_REPORT_DFLT_CFG_PATCH);
    6144                 :            : }
    6145                 :            : 
    6146                 :            : /**
    6147                 :            :  * ice_fw_supports_fec_dis_auto
    6148                 :            :  * @hw: pointer to the hardware structure
    6149                 :            :  *
    6150                 :            :  * Checks if the firmware supports FEC disable in Auto FEC mode
    6151                 :            :  */
    6152         [ #  # ]:          0 : bool ice_fw_supports_fec_dis_auto(struct ice_hw *hw)
    6153                 :            : {
    6154                 :          0 :         return ice_is_fw_min_ver(hw, ICE_FW_FEC_DIS_AUTO_BRANCH,
    6155                 :            :                                  ICE_FW_FEC_DIS_AUTO_MAJ,
    6156                 :            :                                  ICE_FW_FEC_DIS_AUTO_MIN,
    6157                 :            :                                  ICE_FW_FEC_DIS_AUTO_PATCH);
    6158                 :            : }
    6159                 :            : /**
    6160                 :            :  * ice_is_fw_auto_drop_supported
    6161                 :            :  * @hw: pointer to the hardware structure
    6162                 :            :  *
    6163                 :            :  * Checks if the firmware supports auto drop feature
    6164                 :            :  */
    6165                 :          0 : bool ice_is_fw_auto_drop_supported(struct ice_hw *hw)
    6166                 :            : {
    6167         [ #  # ]:          0 :         if (hw->api_maj_ver >= ICE_FW_API_AUTO_DROP_MAJ &&
    6168         [ #  # ]:          0 :             hw->api_min_ver >= ICE_FW_API_AUTO_DROP_MIN)
    6169                 :          0 :                 return true;
    6170                 :            :         return false;
    6171                 :            : }

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